Clean up some unnecessary initializations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83566 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index da4f037f267272247849ef17da5490a974d8f940..0739d4731df3125b20316d7c19cdba712fc5ef9f 100644 (file)
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -1405,7 +1405,7 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
       }
       // Quad registers are loaded with two separate instructions, where one
       // loads the even registers and the other loads the odd registers.
-      EVT RegVT = VT;
+      EVT RegVT;
       unsigned Opc2 = 0;
       switch (VT.getSimpleVT().SimpleTy) {
       default: llvm_unreachable("unhandled vld3 type");
@@ -1465,7 +1465,7 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
       }
       // Quad registers are loaded with two separate instructions, where one
       // loads the even registers and the other loads the odd registers.
-      EVT RegVT = VT;
+      EVT RegVT;
       unsigned Opc2 = 0;
       switch (VT.getSimpleVT().SimpleTy) {
       default: llvm_unreachable("unhandled vld4 type");