setOperationAction(ISD::VASTART, MVT::Other, Custom);
setOperationAction(ISD::VAEND, MVT::Other, Expand);
+ setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
+ setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
+
setSchedulingPreference(SchedulingForRegPressure);
computeRegisterProperties();
}
"ldr $dst, $addr",
[(set IntRegs:$dst, (load iaddr:$addr))]>;
+def FLDS : InstARM<(ops FPRegs:$dst, IntRegs:$addr),
+ "flds $dst, $addr",
+ [(set FPRegs:$dst, (load IntRegs:$addr))]>;
+
def str : InstARM<(ops IntRegs:$src, memri:$addr),
"str $src, $addr",
[(store IntRegs:$src, iaddr:$addr)]>;
add r0, r1, r0
----------------------------------------------------------
+
+add an offset to FLDS addressing mode
+
+----------------------------------------------------------
; RUN: llvm-as < %s | llc -march=arm | grep fsitos &&
; RUN: llvm-as < %s | llc -march=arm | grep fmrs &&
; RUN: llvm-as < %s | llc -march=arm | grep fsitod &&
-; RUN: llvm-as < %s | llc -march=arm | grep fmrrd
+; RUN: llvm-as < %s | llc -march=arm | grep fmrrd &&
+; RUN: llvm-as < %s | llc -march=arm | grep flds &&
+; RUN: llvm-as < %s | llc -march=arm | grep ".word.*1065353216"
float %f(int %a) {
entry:
%tmp = cast int %a to double ; <double> [#uses=1]
ret double %tmp
}
+
+float %h() {
+entry:
+ ret float 1.000000e+00
+}