OptLevel(OptLevel),
FrameLowering(initializeSubtargetDependencies(CPU, FS)),
DL(getDataLayoutString(*this)), InstrInfo(*this), JITInfo(*this),
- TLInfo(TM) {}
+ TLInfo(TM), TSInfo(&DL) {}
/// SetJITMode - This is called to inform the subtarget info that we are
/// producing code for the JIT.
#include "PPCInstrInfo.h"
#include "PPCISelLowering.h"
#include "PPCJITInfo.h"
+#include "PPCSelectionDAGInfo.h"
#include "llvm/ADT/Triple.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/MC/MCInstrItineraries.h"
PPCInstrInfo InstrInfo;
PPCJITInfo JITInfo;
PPCTargetLowering TLInfo;
+ PPCSelectionDAGInfo TSInfo;
public:
/// This constructor initializes the data members to match that
const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
PPCJITInfo *getJITInfo() { return &JITInfo; }
const PPCTargetLowering *getTargetLowering() const { return &TLInfo; }
+ const PPCSelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
/// initializeSubtargetDependencies - Initializes using a CPU and feature string
/// so that we can use initializer lists for subtarget initialization.
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL, bool is64Bit)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
- Subtarget(TT, CPU, FS, *this, is64Bit, OL),
- TSInfo(Subtarget.getDataLayout()) {
+ Subtarget(TT, CPU, FS, *this, is64Bit, OL) {
initAsmInfo();
}
///
class PPCTargetMachine : public LLVMTargetMachine {
PPCSubtarget Subtarget;
- PPCSelectionDAGInfo TSInfo;
public:
PPCTargetMachine(const Target &T, StringRef TT,
return getSubtargetImpl()->getTargetLowering();
}
const PPCSelectionDAGInfo* getSelectionDAGInfo() const override {
- return &TSInfo;
+ return getSubtargetImpl()->getSelectionDAGInfo();
}
const PPCRegisterInfo *getRegisterInfo() const override {
return &getInstrInfo()->getRegisterInfo();