Remove RSTRegClass case from loadRegFromStackSlot

and storeRegToStackSlot.  Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42049 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index ac6d6145e51aab09e33f7e0213412c44168f9dc5..179a71e03fa05221c26cfda2d7fee62db057f081 100644 (file)
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -608,7 +608,7 @@ void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
   // If we have one _and_ we don't want to pop the operand, duplicate the value
   // on the stack instead of moving it.  This ensure that popping the value is
   // always ok.
-  // Ditto FISTTP16m, FISTTP32m, FISTTP64m.
+  // Ditto FISTTP16m, FISTTP32m, FISTTP64m, ST_FpP80m.
   //
   if (!KillsSrc &&
       (MI->getOpcode() == X86::IST_Fp64m32 ||

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 4a8c275bc54efba68ded5becf3058540c091469d..df50efe896ad38612bd7b8d630ef411362f53d5e 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -170,9 +170,7 @@ void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
     Opc = X86::MOV16_mr;
   } else if (RC == &X86::RFP80RegClass) {
     Opc = X86::ST_FpP80m;   // pops
-  } else if (RC == &X86::RFP64RegClass || RC == &X86::RSTRegClass) {
-    /// FIXME spilling long double values as 64 bit does not work.
-    /// We need RST80, unfortunately.
+  } else if (RC == &X86::RFP64RegClass) {
     Opc = X86::ST_Fp64m;
   } else if (RC == &X86::RFP32RegClass) {
     Opc = X86::ST_Fp32m;
@@ -211,7 +209,7 @@ void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
     Opc = X86::MOV16_rm;
   } else if (RC == &X86::RFP80RegClass) {
     Opc = X86::LD_Fp80m;
-  } else if (RC == &X86::RFP64RegClass || RC == &X86::RSTRegClass) {
+  } else if (RC == &X86::RFP64RegClass) {
     Opc = X86::LD_Fp64m;
   } else if (RC == &X86::RFP32RegClass) {
     Opc = X86::LD_Fp32m;