virtual ScheduleHazardRecognizer*
CreateTargetPostRAHazardRecognizer(const InstrItineraryData&) const = 0;
- /// isCompareInstr - If the machine instruction is a comparison instruction,
- /// then return true. Also return the source register in SrcReg and the value
- /// it compares against in CmpValue.
- virtual bool isCompareInstr(const MachineInstr *MI,
+ /// AnalyzeCompare - For a comparison instruction, return the source register
+ /// in SrcReg and the value it compares against in CmpValue. Return true if
+ /// the comparison instruction can be analyzed.
+ virtual bool AnalyzeCompare(const MachineInstr *MI,
unsigned &SrcReg, int &CmpValue) const {
return false;
}
- /// convertToSetZeroFlag - Convert the instruction to set the zero flag so
+ /// ConvertToSetZeroFlag - Convert the instruction to set the zero flag so
/// that we can remove a "comparison with zero".
- virtual bool convertToSetZeroFlag(MachineInstr *Instr,
+ virtual bool ConvertToSetZeroFlag(MachineInstr *Instr,
MachineInstr *CmpInstr) const {
return false;
}
// physical register, we can try to optimize it.
unsigned SrcReg;
int CmpValue;
- if (!TII->isCompareInstr(MI, SrcReg, CmpValue) ||
- TargetRegisterInfo::isPhysicalRegister(SrcReg) ||
- CmpValue != 0)
+ if (!TII->AnalyzeCompare(MI, SrcReg, CmpValue) ||
+ TargetRegisterInfo::isPhysicalRegister(SrcReg) || CmpValue != 0)
return false;
MachineRegisterInfo::def_iterator DI = MRI->def_begin(SrcReg);
return false;
// Attempt to convert the defining instruction to set the "zero" flag.
- if (TII->convertToSetZeroFlag(&*DI, MI)) {
+ if (TII->ConvertToSetZeroFlag(&*DI, MI)) {
++NumEliminated;
return true;
}
for (MachineBasicBlock::iterator
MII = MBB->begin(), ME = MBB->end(); MII != ME; ) {
MachineInstr *MI = &*MII++;
- Changed |= OptimizeCmpInstr(MI, MBB);
+ if (MI->getDesc().isCompare())
+ Changed |= OptimizeCmpInstr(MI, MBB);
}
}
}
bool ARMBaseInstrInfo::
-isCompareInstr(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const {
+AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const {
switch (MI->getOpcode()) {
default: break;
case ARM::t2CMPri:
return false;
}
-/// convertToSetZeroFlag - Convert the instruction to set the "zero" flag so
+/// ConvertToSetZeroFlag - Convert the instruction to set the "zero" flag so
/// that we can remove a "comparison with zero".
bool ARMBaseInstrInfo::
-convertToSetZeroFlag(MachineInstr *MI, MachineInstr *CmpInstr) const {
+ConvertToSetZeroFlag(MachineInstr *MI, MachineInstr *CmpInstr) const {
// Conservatively refuse to convert an instruction which isn't in the same BB
// as the comparison.
if (MI->getParent() != CmpInstr->getParent())
return NumInstrs && NumInstrs == 1;
}
- /// isCompareInstr - If the machine instruction is a comparison instruction,
- /// then return true. Also return the source register in SrcReg and the value
- /// it compares against in CmpValue.
- virtual bool isCompareInstr(const MachineInstr *MI, unsigned &SrcReg,
+ /// AnalyzeCompare - For a comparison instruction, return the source register
+ /// in SrcReg and the value it compares against in CmpValue. Return true if
+ /// the comparison instruction can be analyzed.
+ virtual bool AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg,
int &CmpValue) const;
- /// convertToSetZeroFlag - Convert the instruction to set the zero flag so
+ /// ConvertToSetZeroFlag - Convert the instruction to set the zero flag so
/// that we can remove a "comparison with zero".
- virtual bool convertToSetZeroFlag(MachineInstr *Instr,
+ virtual bool ConvertToSetZeroFlag(MachineInstr *Instr,
MachineInstr *CmpInstr) const;
};
//===----------------------------------------------------------------------===//
// Comparison Instructions...
//
-
+let isCompare = 1 in {
defm t2CMP : T2I_cmp_irs<0b1101, "cmp",
BinOpFrag<(ARMcmp node:$LHS, node:$RHS)>>;
defm t2CMPz : T2I_cmp_irs<0b1101, "cmp",
BinOpFrag<(ARMcmpZ node:$LHS, node:$RHS)>>;
+}
//FIXME: Disable CMN, as CCodes are backwards from compare expectations
// Compare-to-zero still works out, just not the relationals