Reflects MachineConstantPoolEntry changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index c356f09a691378364f5aaf03b30afeec7db7290b..8181e9c17f3f5b5fce0a0d9685a3ba5c0246661d 100644 (file)
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -294,7 +294,7 @@ static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
 static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) {
   MVT::ValueType PtrVT = Op.getValueType();
   ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
-  Constant *C = CP->get();
+  Constant *C = CP->getConstVal();
   SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment());
 
   return CPI;

diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index fde5801f5d4f5c038973ae4bd8adb78e33467efa..a9649ab9a31d10cd6869ed2605ba70bd219e4cc3 100644 (file)
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -436,7 +436,7 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
   }
   case ISD::ConstantPool: {
     ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
-    Constant *C = CP->get();
+    Constant *C = CP->getConstVal();
     SDOperand CPI = DAG.getTargetConstantPool(C, MVT::i64, CP->getAlignment());
     
     SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi,  MVT::i64, CPI,

diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
index 9365b545c4fe065ae0544cbda2bf5d14f5e2eb5f..8367d245cf1b50f4d2ea243cafa616b6e9483d72 100644 (file)
--- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp
+++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
@@ -429,7 +429,7 @@ SDNode *IA64DAGToDAGISel::Select(SDOperand Op) {
   case ISD::ConstantPool: { // TODO: nuke the constant pool
                            //       (ia64 doesn't need one)
     ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
-    Constant *C = CP->get();
+    Constant *C = CP->getConstVal();
     SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64,
                                                   CP->getAlignment());
     return CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64, // ?

diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index 2a64570be885a840119fb05f657b583aa7b15fe4..859530e409a17a869ef24e916020131c12e2af09 100644 (file)
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -136,7 +136,7 @@ static bool isFloatingPointZero(SDOperand Op) {
   else if (Op.getOpcode() == ISD::EXTLOAD || Op.getOpcode() == ISD::LOAD) {
     // Maybe this has already been legalized into the constant pool?
     if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1)))
-      if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->get()))
+      if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal()))
         return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0);
   }
   return false;

diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 31e209adf411e429bd185dd09ac6f898fd1d7449..db33f5f38e9e3ca589e6fa4fc42478e4a619ace3 100644 (file)
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -314,7 +314,7 @@ static bool isFloatingPointZero(SDOperand Op) {
   else if (Op.getOpcode() == ISD::EXTLOAD || Op.getOpcode() == ISD::LOAD) {
     // Maybe this has already been legalized into the constant pool?
     if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1)))
-      if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->get()))
+      if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal()))
         return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0);
   }
   return false;
@@ -601,7 +601,7 @@ SDOperand PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) {
 static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) {
   MVT::ValueType PtrVT = Op.getValueType();
   ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
-  Constant *C = CP->get();
+  Constant *C = CP->getConstVal();
   SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment());
   SDOperand Zero = DAG.getConstant(0, PtrVT);
 

diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index a30e739420759e44ae97d6a1858ca4eae455201a..1d1b595743ce479a7fa4ff4e4ee6a8f44f13697d 100644 (file)
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -704,7 +704,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi);
   }
   case ISD::ConstantPool: {
-    Constant *C = cast<ConstantPoolSDNode>(Op)->get();
+    Constant *C = cast<ConstantPoolSDNode>(Op)->getConstVal();
     SDOperand CP = DAG.getTargetConstantPool(C, MVT::i32,
                                   cast<ConstantPoolSDNode>(Op)->getAlignment());
     SDOperand Hi = DAG.getNode(SPISD::Hi, MVT::i32, CP);

diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 4287ab27912b452034c686319d1d2d07a63e1464..20e7edc668f18f79da0cd1adab79eece71ca059a 100644 (file)
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -540,7 +540,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
       if (ConstantPoolSDNode *CP =
           dyn_cast<ConstantPoolSDNode>(N.getOperand(0))) {
         if (AM.CP == 0) {
-          AM.CP = CP->get();
+          AM.CP = CP->getConstVal();
           AM.Align = CP->getAlignment();
           AM.Disp += CP->getOffset();
           if (isRIP)
@@ -872,7 +872,7 @@ SDNode *X86DAGToDAGISel::Select(SDOperand N) {
                                              G->getOffset() + Offset);
         } else if (ConstantPoolSDNode *CP =
                    dyn_cast<ConstantPoolSDNode>(N0.getOperand(0))) {
-          C = CurDAG->getTargetConstantPool(CP->get(), PtrVT,
+          C = CurDAG->getTargetConstantPool(CP->getConstVal(), PtrVT,
                                             CP->getAlignment(),
                                             CP->getOffset()+Offset);
         }

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 2897eee251bc2244e93030328e540d4c51d336dc..5da23f934470d2d350426d352a3466b649727903 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -3329,8 +3329,9 @@ SDOperand
 X86TargetLowering::LowerConstantPool(SDOperand Op, SelectionDAG &DAG) {
   ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
   SDOperand Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(),
-                            DAG.getTargetConstantPool(CP->get(), getPointerTy(),
-                                                      CP->getAlignment()));
+                                 DAG.getTargetConstantPool(CP->getConstVal(),
+                                                           getPointerTy(),
+                                                           CP->getAlignment()));
   if (Subtarget->isTargetDarwin()) {
     // With PIC, the address is actually $g + Offset.
     if (!Subtarget->is64Bit() &&