Add catch block handling to SjLj exception handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78817 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/AsmPrinter/DwarfException.cpp b/lib/CodeGen/AsmPrinter/DwarfException.cpp
index a0cd456d372023b24bec0b447690daf25e82b256..77e4ddd1010ac74ed82e66f2ab8c7b43ddf56a82 100644 (file)
--- a/lib/CodeGen/AsmPrinter/DwarfException.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfException.cpp
@@ -531,6 +531,11 @@ void DwarfException::EmitExceptionTable() {
   const unsigned SiteLengthSize = sizeof(int32_t); // DW_EH_PE_udata4
   const unsigned LandingPadSize = sizeof(int32_t); // DW_EH_PE_udata4
   unsigned SizeSites;
+
+  bool HaveTTData = (TAI->getExceptionHandlingType() == ExceptionHandling::SjLj)
+    ? (!TypeInfos.empty() || !FilterIds.empty()) : true;
+
+
   if (TAI->getExceptionHandlingType() == ExceptionHandling::SjLj) {
     SizeSites = (MF->getMaxCallSiteIndex() - CallSites.size()) *
       TargetAsmInfo::getULEB128Size(0) * 2;
@@ -553,7 +558,8 @@ void DwarfException::EmitExceptionTable() {
 
   unsigned TotalSize = sizeof(int8_t) + // LPStart format
                        sizeof(int8_t) + // TType format
-           TargetAsmInfo::getULEB128Size(TypeOffset) + // TType base offset
+       (HaveTTData ?
+          TargetAsmInfo::getULEB128Size(TypeOffset) : 0) + // TType base offset
                        TypeOffset;
 
   unsigned SizeAlign = (4 - TotalSize) & 3;
@@ -624,11 +630,10 @@ void DwarfException::EmitExceptionTable() {
     Asm->EOL("TType base offset");
   }
 #else
-  // For SjLj exceptions, is there is no TypeInfo, then we just explicitly
+  // For SjLj exceptions, if there is no TypeInfo, then we just explicitly
   // say that we're omitting that bit.
   // FIXME: does this apply to Dwarf also? The above #if 0 implies yes?
-  if (TAI->getExceptionHandlingType() == ExceptionHandling::SjLj
-      && (TypeInfos.empty() || FilterIds.empty())) {
+  if (!HaveTTData) {
     Asm->EmitInt8(dwarf::DW_EH_PE_omit);
     Asm->EOL("TType format (DW_EH_PE_omit)");
   } else {

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 366c87cd1aca3ef6422ab75f65e70a789da22e04..0d2d7d2ad4058cbc090fa22da12a7234cbbdd0d0 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -312,6 +312,10 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
   setOperationAction(ISD::VAEND,              MVT::Other, Expand);
   setOperationAction(ISD::STACKSAVE,          MVT::Other, Expand);
   setOperationAction(ISD::STACKRESTORE,       MVT::Other, Expand);
+  setOperationAction(ISD::EHSELECTION,        MVT::i32,   Expand);
+  // FIXME: Shouldn't need this, since no register is used, but the legalizer
+  // doesn't yet know how to not do that for SjLj.
+  setExceptionSelectorRegister(ARM::R0);
   if (Subtarget->isThumb())
     setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
   else