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80 col violation.
author
Evan Cheng
<evan.cheng@apple.com>
Fri, 10 Jul 2009 05:20:19 +0000
(
05:20
+0000)
committer
Evan Cheng
<evan.cheng@apple.com>
Fri, 10 Jul 2009 05:20:19 +0000
(
05:20
+0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75226
91177308
-0d34-0410-b5e6-
96231b3b80d8
include/llvm/Target/Target.td
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diff --git
a/include/llvm/Target/Target.td
b/include/llvm/Target/Target.td
index ebd826a6f4a163a75c6020808c3819a6ba95e799..94ae94a14b57e2808b683a46c03e3d770a13cf33 100644
(file)
--- a/
include/llvm/Target/Target.td
+++ b/
include/llvm/Target/Target.td
@@
-302,8
+302,8
@@
class PredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal>
}
/// OptionalDefOperand - This is used to define a optional definition operand
-/// for an instruction. DefaultOps is the register the operand represents if
none
-/// is supplied, e.g. zero_reg.
+/// for an instruction. DefaultOps is the register the operand represents if
+///
none
is supplied, e.g. zero_reg.
class OptionalDefOperand<ValueType ty, dag OpTypes, dag defaultops>
: Operand<ty> {
let MIOperandInfo = OpTypes;