unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const = 0;
+ /// reMaterialize - Re-issue the specified 'original' instruction at the
+ /// specific location targeting a new destination register.
+ virtual void reMaterialize(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg,
+ const MachineInstr *Orig) const = 0;
+
/// foldMemoryOperand - Attempt to fold a load or store of the
/// specified stack slot into the specified machine instruction for
/// the specified operand. If this is possible, a new instruction
abort();
}
+/// emitLoadConstPool - Emits a load from constpool to materialize the
+/// specified immediate.
+static void emitLoadConstPool(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI,
+ unsigned DestReg, int Val,
+ const TargetInstrInfo &TII, bool isThumb) {
+ MachineFunction &MF = *MBB.getParent();
+ MachineConstantPool *ConstantPool = MF.getConstantPool();
+ Constant *C = ConstantInt::get(Type::Int32Ty, Val);
+ unsigned Idx = ConstantPool->getConstantPoolIndex(C, 2);
+ if (isThumb)
+ BuildMI(MBB, MBBI, TII.get(ARM::tLDRcp), DestReg).addConstantPoolIndex(Idx);
+ else
+ BuildMI(MBB, MBBI, TII.get(ARM::LDRcp), DestReg).addConstantPoolIndex(Idx)
+ .addReg(0).addImm(0);
+}
+
+void ARMRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I,
+ unsigned DestReg,
+ const MachineInstr *Orig) const {
+ if (Orig->getOpcode() == ARM::MOVi2pieces) {
+ emitLoadConstPool(MBB, I, DestReg, Orig->getOperand(1).getImmedValue(),
+ TII, false);
+ return;
+ }
+
+ MachineInstr *MI = Orig->clone();
+ MI->getOperand(0).setReg(DestReg);
+ MBB.insert(I, MI);
+}
+
/// isLowRegister - Returns true if the register is low register r0-r7.
///
static bool isLowRegister(unsigned Reg) {
return NumMIs;
}
-/// emitLoadConstPool - Emits a load from constpool to materialize NumBytes
-/// immediate.
-static void emitLoadConstPool(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI,
- unsigned DestReg, int NumBytes,
- const TargetInstrInfo &TII) {
- MachineFunction &MF = *MBB.getParent();
- MachineConstantPool *ConstantPool = MF.getConstantPool();
- Constant *C = ConstantInt::get(Type::Int32Ty, NumBytes);
- unsigned Idx = ConstantPool->getConstantPoolIndex(C, 2);
- BuildMI(MBB, MBBI, TII.get(ARM::tLDRpci), DestReg).addConstantPoolIndex(Idx);
-}
-
/// emitThumbRegPlusImmInReg - Emits a series of instructions to materialize
/// a destreg = basereg + immediate in Thumb code. Materialize the immediate
/// in a register using mov / mvn sequences or load the immediate from a
BuildMI(MBB, MBBI, TII.get(ARM::tNEG), LdReg)
.addReg(LdReg, false, false, true);
} else
- emitLoadConstPool(MBB, MBBI, LdReg, NumBytes, TII);
+ emitLoadConstPool(MBB, MBBI, LdReg, NumBytes, TII, true);
// Emit add / sub.
int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr);
if (FrameReg == ARM::SP)
emitThumbRegPlusImmInReg(MBB, II, TmpReg, FrameReg,Offset,false,TII);
else {
- emitLoadConstPool(MBB, II, TmpReg, Offset, TII);
+ emitLoadConstPool(MBB, II, TmpReg, Offset, TII, true);
UseRR = true;
}
} else
if (FrameReg == ARM::SP)
emitThumbRegPlusImmInReg(MBB, II, TmpReg, FrameReg,Offset,false,TII);
else {
- emitLoadConstPool(MBB, II, TmpReg, Offset, TII);
+ emitLoadConstPool(MBB, II, TmpReg, Offset, TII, true);
UseRR = true;
}
} else
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
+ void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+ unsigned DestReg, const MachineInstr *Orig) const;
+
MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
int FrameIndex) const;
}
}
+void AlphaRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I,
+ unsigned DestReg,
+ const MachineInstr *Orig) const {
+ MachineInstr *MI = Orig->clone();
+ MI->getOperand(0).setReg(DestReg);
+ MBB.insert(I, MI);
+}
+
const unsigned* AlphaRegisterInfo::getCalleeSavedRegs() const {
static const unsigned CalleeSavedRegs[] = {
Alpha::R9, Alpha::R10,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
+ void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+ unsigned DestReg, const MachineInstr *Orig) const;
+
const unsigned *getCalleeSavedRegs() const;
const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
BuildMI(MBB, MI, TII.get(IA64::MOV), DestReg).addReg(SrcReg);
}
+void IA64RegisterInfo::reMaterialize(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I,
+ unsigned DestReg,
+ const MachineInstr *Orig) const {
+ MachineInstr *MI = Orig->clone();
+ MI->getOperand(0).setReg(DestReg);
+ MBB.insert(I, MI);
+}
+
const unsigned* IA64RegisterInfo::getCalleeSavedRegs() const {
static const unsigned CalleeSavedRegs[] = {
IA64::r5, 0
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
+ void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+ unsigned DestReg, const MachineInstr *Orig) const;
+
const unsigned *getCalleeSavedRegs() const;
const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
}
}
+void PPCRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I,
+ unsigned DestReg,
+ const MachineInstr *Orig) const {
+ MachineInstr *MI = Orig->clone();
+ MI->getOperand(0).setReg(DestReg);
+ MBB.insert(I, MI);
+}
+
const unsigned* PPCRegisterInfo::getCalleeSavedRegs() const {
// 32-bit Darwin calling convention.
static const unsigned Darwin32_CalleeSavedRegs[] = {
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
+ void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+ unsigned DestReg, const MachineInstr *Orig) const;
+
/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
/// copy instructions, turning them into load/store instructions.
virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
assert (0 && "Can't copy this register");
}
+void SparcRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I,
+ unsigned DestReg,
+ const MachineInstr *Orig) const {
+ MachineInstr *MI = Orig->clone();
+ MI->getOperand(0).setReg(DestReg);
+ MBB.insert(I, MI);
+}
+
MachineInstr *SparcRegisterInfo::foldMemoryOperand(MachineInstr* MI,
unsigned OpNum,
int FI) const {
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
+ void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+ unsigned DestReg, const MachineInstr *Orig) const;
+
virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
unsigned OpNum,
int FrameIndex) const;
BuildMI(MBB, MI, TII.get(Opc), DestReg).addReg(SrcReg);
}
+
+void X86RegisterInfo::reMaterialize(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I,
+ unsigned DestReg,
+ const MachineInstr *Orig) const {
+ MachineInstr *MI = Orig->clone();
+ MI->getOperand(0).setReg(DestReg);
+ MBB.insert(I, MI);
+}
+
static MachineInstr *FuseTwoAddrInst(unsigned Opcode, unsigned FrameIndex,
MachineInstr *MI,
const TargetInstrInfo &TII) {
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
+
+ void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+ unsigned DestReg, const MachineInstr *Orig) const;
/// foldMemoryOperand - If this target supports it, fold a load or store of
/// the specified stack slot into the specified machine instruction for the