Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76398 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/Thumb/asmprinter-bug.ll b/test/CodeGen/Thumb/asmprinter-bug.ll
new file mode 100644 (file)
index 0000000..f5553b4
--- /dev/null
+++ b/test/CodeGen/Thumb/asmprinter-bug.ll
@@ -0,0 +1,288 @@
+; RUN: llvm-as < %s | llc -mtriple=thumbv6-apple-darwin10 | grep rsbs | grep {#0}
+
+       %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+       %struct.__sFILEX = type opaque
+       %struct.__sbuf = type { i8*, i32 }
+       %struct.adpcm_state = type { i16, i8 }
+@stepsizeTable = internal constant [89 x i32] [i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 16, i32 17, i32 19, i32 21, i32 23, i32 25, i32 28, i32 31, i32 34, i32 37, i32 41, i32 45, i32 50, i32 55, i32 60, i32 66, i32 73, i32 80, i32 88, i32 97, i32 107, i32 118, i32 130, i32 143, i32 157, i32 173, i32 190, i32 209, i32 230, i32 253, i32 279, i32 307, i32 337, i32 371, i32 408, i32 449, i32 494, i32 544, i32 598, i32 658, i32 724, i32 796, i32 876, i32 963, i32 1060, i32 1166, i32 1282, i32 1411, i32 1552, i32 1707, i32 1878, i32 2066, i32 2272, i32 2499, i32 2749, i32 3024, i32 3327, i32 3660, i32 4026, i32 4428, i32 4871, i32 5358, i32 5894, i32 6484, i32 7132, i32 7845, i32 8630, i32 9493, i32 10442, i32 11487, i32 12635, i32 13899, i32 15289, i32 16818, i32 18500, i32 20350, i32 22385, i32 24623, i32 27086, i32 29794, i32 32767]             ; <[89 x i32]*> [#uses=4]
+@indexTable = internal constant [16 x i32] [i32 -1, i32 -1, i32 -1, i32 -1, i32 2, i32 4, i32 6, i32 8, i32 -1, i32 -1, i32 -1, i32 -1, i32 2, i32 4, i32 6, i32 8]            ; <[16 x i32]*> [#uses=2]
+@abuf = common global [500 x i8] zeroinitializer               ; <[500 x i8]*> [#uses=1]
+@.str = private constant [11 x i8] c"input file\00", section "__TEXT,__cstring,cstring_literals", align 1              ; <[11 x i8]*> [#uses=1]
+@sbuf = common global [1000 x i16] zeroinitializer             ; <[1000 x i16]*> [#uses=1]
+@state = common global %struct.adpcm_state zeroinitializer             ; <%struct.adpcm_state*> [#uses=3]
+@__stderrp = external global %struct.FILE*             ; <%struct.FILE**> [#uses=1]
+@.str1 = private constant [28 x i8] c"Final valprev=%d, index=%d\0A\00", section "__TEXT,__cstring,cstring_literals", align 1          ; <[28 x i8]*> [#uses=1]
+
+define arm_apcscc void @adpcm_coder(i16* nocapture %indata, i8* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
+entry:
+       %0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0            ; <i16*> [#uses=2]
+       %1 = load i16* %0, align 2              ; <i16> [#uses=1]
+       %2 = sext i16 %1 to i32         ; <i32> [#uses=2]
+       %3 = getelementptr %struct.adpcm_state* %state, i32 0, i32 1            ; <i8*> [#uses=2]
+       %4 = load i8* %3, align 2               ; <i8> [#uses=1]
+       %5 = sext i8 %4 to i32          ; <i32> [#uses=3]
+       %6 = getelementptr [89 x i32]* @stepsizeTable, i32 0, i32 %5            ; <i32*> [#uses=1]
+       %7 = load i32* %6, align 4              ; <i32> [#uses=1]
+       %8 = icmp sgt i32 %len, 0               ; <i1> [#uses=1]
+       br i1 %8, label %bb, label %bb27
+
+bb:            ; preds = %bb25, %entry
+       %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb25 ]                ; <i32> [#uses=2]
+       %outp.136 = phi i8* [ %outdata, %entry ], [ %outp.0, %bb25 ]            ; <i8*> [#uses=3]
+       %bufferstep.035 = phi i32 [ 1, %entry ], [ %tmp, %bb25 ]                ; <i32> [#uses=3]
+       %outputbuffer.134 = phi i32 [ undef, %entry ], [ %outputbuffer.0, %bb25 ]               ; <i32> [#uses=2]
+       %index.033 = phi i32 [ %5, %entry ], [ %index.2, %bb25 ]                ; <i32> [#uses=1]
+       %valpred.132 = phi i32 [ %2, %entry ], [ %valpred.2, %bb25 ]            ; <i32> [#uses=2]
+       %step.031 = phi i32 [ %7, %entry ], [ %36, %bb25 ]              ; <i32> [#uses=5]
+       %inp.038 = getelementptr i16* %indata, i32 %indvar              ; <i16*> [#uses=1]
+       %9 = load i16* %inp.038, align 2                ; <i16> [#uses=1]
+       %10 = sext i16 %9 to i32                ; <i32> [#uses=1]
+       %11 = sub i32 %10, %valpred.132         ; <i32> [#uses=3]
+       %12 = icmp slt i32 %11, 0               ; <i1> [#uses=1]
+       %iftmp.1.0 = select i1 %12, i32 8, i32 0                ; <i32> [#uses=2]
+       %13 = sub i32 0, %11            ; <i32> [#uses=1]
+       %14 = icmp eq i32 %iftmp.1.0, 0         ; <i1> [#uses=2]
+       %. = select i1 %14, i32 %11, i32 %13            ; <i32> [#uses=2]
+       %15 = ashr i32 %step.031, 3             ; <i32> [#uses=1]
+       %16 = icmp slt i32 %., %step.031                ; <i1> [#uses=2]
+       %delta.0 = select i1 %16, i32 0, i32 4          ; <i32> [#uses=2]
+       %17 = select i1 %16, i32 0, i32 %step.031               ; <i32> [#uses=2]
+       %diff.1 = sub i32 %., %17               ; <i32> [#uses=2]
+       %18 = ashr i32 %step.031, 1             ; <i32> [#uses=2]
+       %19 = icmp slt i32 %diff.1, %18         ; <i1> [#uses=2]
+       %20 = or i32 %delta.0, 2                ; <i32> [#uses=1]
+       %21 = select i1 %19, i32 %delta.0, i32 %20              ; <i32> [#uses=1]
+       %22 = select i1 %19, i32 0, i32 %18             ; <i32> [#uses=2]
+       %diff.2 = sub i32 %diff.1, %22          ; <i32> [#uses=1]
+       %23 = ashr i32 %step.031, 2             ; <i32> [#uses=2]
+       %24 = icmp slt i32 %diff.2, %23         ; <i1> [#uses=2]
+       %25 = zext i1 %24 to i32                ; <i32> [#uses=1]
+       %26 = select i1 %24, i32 0, i32 %23             ; <i32> [#uses=1]
+       %vpdiff.0 = add i32 %17, %15            ; <i32> [#uses=1]
+       %vpdiff.1 = add i32 %vpdiff.0, %22              ; <i32> [#uses=1]
+       %vpdiff.2 = add i32 %vpdiff.1, %26              ; <i32> [#uses=2]
+       %tmp30 = sub i32 0, %vpdiff.2           ; <i32> [#uses=1]
+       %valpred.0.p = select i1 %14, i32 %vpdiff.2, i32 %tmp30         ; <i32> [#uses=1]
+       %valpred.0 = add i32 %valpred.0.p, %valpred.132         ; <i32> [#uses=3]
+       %27 = icmp sgt i32 %valpred.0, 32767            ; <i1> [#uses=1]
+       br i1 %27, label %bb18, label %bb16
+
+bb16:          ; preds = %bb
+       %28 = icmp slt i32 %valpred.0, -32768           ; <i1> [#uses=1]
+       br i1 %28, label %bb17, label %bb18
+
+bb17:          ; preds = %bb16
+       br label %bb18
+
+bb18:          ; preds = %bb17, %bb16, %bb
+       %valpred.2 = phi i32 [ -32768, %bb17 ], [ 32767, %bb ], [ %valpred.0, %bb16 ]           ; <i32> [#uses=2]
+       %delta.1 = or i32 %21, %iftmp.1.0               ; <i32> [#uses=1]
+       %delta.2 = or i32 %delta.1, %25         ; <i32> [#uses=1]
+       %29 = xor i32 %delta.2, 1               ; <i32> [#uses=3]
+       %30 = getelementptr [16 x i32]* @indexTable, i32 0, i32 %29             ; <i32*> [#uses=1]
+       %31 = load i32* %30, align 4            ; <i32> [#uses=1]
+       %32 = add i32 %31, %index.033           ; <i32> [#uses=2]
+       %33 = icmp slt i32 %32, 0               ; <i1> [#uses=1]
+       %index.1 = select i1 %33, i32 0, i32 %32                ; <i32> [#uses=2]
+       %34 = icmp sgt i32 %index.1, 88         ; <i1> [#uses=1]
+       %index.2 = select i1 %34, i32 88, i32 %index.1          ; <i32> [#uses=3]
+       %35 = getelementptr [89 x i32]* @stepsizeTable, i32 0, i32 %index.2             ; <i32*> [#uses=1]
+       %36 = load i32* %35, align 4            ; <i32> [#uses=1]
+       %37 = icmp eq i32 %bufferstep.035, 0            ; <i1> [#uses=1]
+       br i1 %37, label %bb24, label %bb23
+
+bb23:          ; preds = %bb18
+       %38 = shl i32 %29, 4            ; <i32> [#uses=1]
+       %39 = and i32 %38, 240          ; <i32> [#uses=1]
+       br label %bb25
+
+bb24:          ; preds = %bb18
+       %40 = trunc i32 %29 to i8               ; <i8> [#uses=1]
+       %41 = and i8 %40, 15            ; <i8> [#uses=1]
+       %42 = trunc i32 %outputbuffer.134 to i8         ; <i8> [#uses=1]
+       %43 = or i8 %41, %42            ; <i8> [#uses=1]
+       store i8 %43, i8* %outp.136, align 1
+       %44 = getelementptr i8* %outp.136, i32 1                ; <i8*> [#uses=1]
+       br label %bb25
+
+bb25:          ; preds = %bb24, %bb23
+       %outputbuffer.0 = phi i32 [ %39, %bb23 ], [ %outputbuffer.134, %bb24 ]          ; <i32> [#uses=2]
+       %outp.0 = phi i8* [ %outp.136, %bb23 ], [ %44, %bb24 ]          ; <i8*> [#uses=2]
+       %tmp = xor i32 %bufferstep.035, 1               ; <i32> [#uses=1]
+       %indvar.next = add i32 %indvar, 1               ; <i32> [#uses=2]
+       %exitcond = icmp eq i32 %indvar.next, %len              ; <i1> [#uses=1]
+       br i1 %exitcond, label %bb26.bb27_crit_edge, label %bb
+
+bb26.bb27_crit_edge:           ; preds = %bb25
+       %phitmp44 = icmp eq i32 %bufferstep.035, 1              ; <i1> [#uses=1]
+       br label %bb27
+
+bb27:          ; preds = %bb26.bb27_crit_edge, %entry
+       %outp.1.lcssa = phi i8* [ %outp.0, %bb26.bb27_crit_edge ], [ %outdata, %entry ]         ; <i8*> [#uses=1]
+       %bufferstep.0.lcssa = phi i1 [ %phitmp44, %bb26.bb27_crit_edge ], [ false, %entry ]             ; <i1> [#uses=1]
+       %outputbuffer.1.lcssa = phi i32 [ %outputbuffer.0, %bb26.bb27_crit_edge ], [ undef, %entry ]            ; <i32> [#uses=1]
+       %index.0.lcssa = phi i32 [ %index.2, %bb26.bb27_crit_edge ], [ %5, %entry ]             ; <i32> [#uses=1]
+       %valpred.1.lcssa = phi i32 [ %valpred.2, %bb26.bb27_crit_edge ], [ %2, %entry ]         ; <i32> [#uses=1]
+       br i1 %bufferstep.0.lcssa, label %bb28, label %bb29
+
+bb28:          ; preds = %bb27
+       %45 = trunc i32 %outputbuffer.1.lcssa to i8             ; <i8> [#uses=1]
+       store i8 %45, i8* %outp.1.lcssa, align 1
+       br label %bb29
+
+bb29:          ; preds = %bb28, %bb27
+       %46 = trunc i32 %valpred.1.lcssa to i16         ; <i16> [#uses=1]
+       store i16 %46, i16* %0, align 2
+       %47 = trunc i32 %index.0.lcssa to i8            ; <i8> [#uses=1]
+       store i8 %47, i8* %3, align 2
+       ret void
+}
+
+define arm_apcscc void @adpcm_decoder(i8* nocapture %indata, i16* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
+entry:
+       %0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0            ; <i16*> [#uses=2]
+       %1 = load i16* %0, align 2              ; <i16> [#uses=1]
+       %2 = sext i16 %1 to i32         ; <i32> [#uses=2]
+       %3 = getelementptr %struct.adpcm_state* %state, i32 0, i32 1            ; <i8*> [#uses=2]
+       %4 = load i8* %3, align 2               ; <i8> [#uses=1]
+       %5 = sext i8 %4 to i32          ; <i32> [#uses=3]
+       %6 = getelementptr [89 x i32]* @stepsizeTable, i32 0, i32 %5            ; <i32*> [#uses=1]
+       %7 = load i32* %6, align 4              ; <i32> [#uses=1]
+       %8 = icmp sgt i32 %len, 0               ; <i1> [#uses=1]
+       br i1 %8, label %bb, label %bb22
+
+bb:            ; preds = %bb20, %entry
+       %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb20 ]                ; <i32> [#uses=2]
+       %inp.131 = phi i8* [ %indata, %entry ], [ %inp.0, %bb20 ]               ; <i8*> [#uses=3]
+       %bufferstep.028 = phi i32 [ 0, %entry ], [ %tmp, %bb20 ]                ; <i32> [#uses=2]
+       %inputbuffer.127 = phi i32 [ undef, %entry ], [ %inputbuffer.0, %bb20 ]         ; <i32> [#uses=2]
+       %index.026 = phi i32 [ %5, %entry ], [ %index.2, %bb20 ]                ; <i32> [#uses=1]
+       %valpred.125 = phi i32 [ %2, %entry ], [ %valpred.2, %bb20 ]            ; <i32> [#uses=1]
+       %step.024 = phi i32 [ %7, %entry ], [ %35, %bb20 ]              ; <i32> [#uses=4]
+       %outp.030 = getelementptr i16* %outdata, i32 %indvar            ; <i16*> [#uses=1]
+       %9 = icmp eq i32 %bufferstep.028, 0             ; <i1> [#uses=1]
+       br i1 %9, label %bb2, label %bb3
+
+bb2:           ; preds = %bb
+       %10 = load i8* %inp.131, align 1                ; <i8> [#uses=1]
+       %11 = sext i8 %10 to i32                ; <i32> [#uses=2]
+       %12 = getelementptr i8* %inp.131, i32 1         ; <i8*> [#uses=1]
+       %13 = ashr i32 %11, 4           ; <i32> [#uses=1]
+       br label %bb3
+
+bb3:           ; preds = %bb2, %bb
+       %inputbuffer.0 = phi i32 [ %11, %bb2 ], [ %inputbuffer.127, %bb ]               ; <i32> [#uses=1]
+       %delta.0.in = phi i32 [ %13, %bb2 ], [ %inputbuffer.127, %bb ]          ; <i32> [#uses=5]
+       %inp.0 = phi i8* [ %12, %bb2 ], [ %inp.131, %bb ]               ; <i8*> [#uses=1]
+       %delta.0 = and i32 %delta.0.in, 15              ; <i32> [#uses=1]
+       %tmp = xor i32 %bufferstep.028, 1               ; <i32> [#uses=1]
+       %14 = getelementptr [16 x i32]* @indexTable, i32 0, i32 %delta.0                ; <i32*> [#uses=1]
+       %15 = load i32* %14, align 4            ; <i32> [#uses=1]
+       %16 = add i32 %15, %index.026           ; <i32> [#uses=2]
+       %17 = icmp slt i32 %16, 0               ; <i1> [#uses=1]
+       %index.1 = select i1 %17, i32 0, i32 %16                ; <i32> [#uses=2]
+       %18 = icmp sgt i32 %index.1, 88         ; <i1> [#uses=1]
+       %index.2 = select i1 %18, i32 88, i32 %index.1          ; <i32> [#uses=3]
+       %19 = and i32 %delta.0.in, 8            ; <i32> [#uses=1]
+       %20 = ashr i32 %step.024, 3             ; <i32> [#uses=1]
+       %21 = and i32 %delta.0.in, 4            ; <i32> [#uses=1]
+       %22 = icmp eq i32 %21, 0                ; <i1> [#uses=1]
+       %23 = select i1 %22, i32 0, i32 %step.024               ; <i32> [#uses=1]
+       %vpdiff.0 = add i32 %23, %20            ; <i32> [#uses=2]
+       %24 = and i32 %delta.0.in, 2            ; <i32> [#uses=1]
+       %25 = icmp eq i32 %24, 0                ; <i1> [#uses=1]
+       br i1 %25, label %bb11, label %bb10
+
+bb10:          ; preds = %bb3
+       %26 = ashr i32 %step.024, 1             ; <i32> [#uses=1]
+       %27 = add i32 %vpdiff.0, %26            ; <i32> [#uses=1]
+       br label %bb11
+
+bb11:          ; preds = %bb10, %bb3
+       %vpdiff.1 = phi i32 [ %27, %bb10 ], [ %vpdiff.0, %bb3 ]         ; <i32> [#uses=2]
+       %28 = and i32 %delta.0.in, 1            ; <i32> [#uses=1]
+       %toBool = icmp eq i32 %28, 0            ; <i1> [#uses=1]
+       br i1 %toBool, label %bb13, label %bb12
+
+bb12:          ; preds = %bb11
+       %29 = ashr i32 %step.024, 2             ; <i32> [#uses=1]
+       %30 = add i32 %vpdiff.1, %29            ; <i32> [#uses=1]
+       br label %bb13
+
+bb13:          ; preds = %bb12, %bb11
+       %vpdiff.2 = phi i32 [ %30, %bb12 ], [ %vpdiff.1, %bb11 ]                ; <i32> [#uses=2]
+       %31 = icmp eq i32 %19, 0                ; <i1> [#uses=1]
+       %tmp23 = sub i32 0, %vpdiff.2           ; <i32> [#uses=1]
+       %valpred.0.p = select i1 %31, i32 %vpdiff.2, i32 %tmp23         ; <i32> [#uses=1]
+       %valpred.0 = add i32 %valpred.0.p, %valpred.125         ; <i32> [#uses=3]
+       %32 = icmp sgt i32 %valpred.0, 32767            ; <i1> [#uses=1]
+       br i1 %32, label %bb20, label %bb18
+
+bb18:          ; preds = %bb13
+       %33 = icmp slt i32 %valpred.0, -32768           ; <i1> [#uses=1]
+       br i1 %33, label %bb19, label %bb20
+
+bb19:          ; preds = %bb18
+       br label %bb20
+
+bb20:          ; preds = %bb19, %bb18, %bb13
+       %valpred.2 = phi i32 [ -32768, %bb19 ], [ 32767, %bb13 ], [ %valpred.0, %bb18 ]         ; <i32> [#uses=3]
+       %34 = getelementptr [89 x i32]* @stepsizeTable, i32 0, i32 %index.2             ; <i32*> [#uses=1]
+       %35 = load i32* %34, align 4            ; <i32> [#uses=1]
+       %36 = trunc i32 %valpred.2 to i16               ; <i16> [#uses=1]
+       store i16 %36, i16* %outp.030, align 2
+       %indvar.next = add i32 %indvar, 1               ; <i32> [#uses=2]
+       %exitcond = icmp eq i32 %indvar.next, %len              ; <i1> [#uses=1]
+       br i1 %exitcond, label %bb22, label %bb
+
+bb22:          ; preds = %bb20, %entry
+       %index.0.lcssa = phi i32 [ %5, %entry ], [ %index.2, %bb20 ]            ; <i32> [#uses=1]
+       %valpred.1.lcssa = phi i32 [ %2, %entry ], [ %valpred.2, %bb20 ]                ; <i32> [#uses=1]
+       %37 = trunc i32 %valpred.1.lcssa to i16         ; <i16> [#uses=1]
+       store i16 %37, i16* %0, align 2
+       %38 = trunc i32 %index.0.lcssa to i8            ; <i8> [#uses=1]
+       store i8 %38, i8* %3, align 2
+       ret void
+}
+
+define arm_apcscc i32 @main() nounwind {
+entry:
+       br label %bb
+
+bb:            ; preds = %bb3, %entry
+       %0 = tail call arm_apcscc  i32 (...)* @read(i32 0, i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i32 500) nounwind               ; <i32> [#uses=4]
+       %1 = icmp slt i32 %0, 0         ; <i1> [#uses=1]
+       br i1 %1, label %bb1, label %bb2
+
+bb1:           ; preds = %bb
+       tail call arm_apcscc  void @perror(i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0)) nounwind
+       ret i32 1
+
+bb2:           ; preds = %bb
+       %2 = icmp eq i32 %0, 0          ; <i1> [#uses=1]
+       br i1 %2, label %bb4, label %bb3
+
+bb3:           ; preds = %bb2
+       %3 = shl i32 %0, 1              ; <i32> [#uses=1]
+       tail call arm_apcscc  void @adpcm_decoder(i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %3, %struct.adpcm_state* @state) nounwind
+       %4 = shl i32 %0, 2              ; <i32> [#uses=1]
+       %5 = tail call arm_apcscc  i32 (...)* @write(i32 1, i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %4) nounwind            ; <i32> [#uses=0]
+       br label %bb
+
+bb4:           ; preds = %bb2
+       %6 = load %struct.FILE** @__stderrp, align 4            ; <%struct.FILE*> [#uses=1]
+       %7 = load i16* getelementptr (%struct.adpcm_state* @state, i32 0, i32 0), align 4               ; <i16> [#uses=1]
+       %8 = sext i16 %7 to i32         ; <i32> [#uses=1]
+       %9 = load i8* getelementptr (%struct.adpcm_state* @state, i32 0, i32 1), align 2                ; <i8> [#uses=1]
+       %10 = sext i8 %9 to i32         ; <i32> [#uses=1]
+       %11 = tail call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %6, i8* getelementptr ([28 x i8]* @.str1, i32 0, i32 0), i32 %8, i32 %10) nounwind            ; <i32> [#uses=0]
+       ret i32 0
+}
+
+declare arm_apcscc i32 @read(...)
+
+declare arm_apcscc void @perror(i8* nocapture) nounwind
+
+declare arm_apcscc i32 @write(...)
+
+declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index d1cb7022d06d070acec843bca13334ef697013f1..f34feef0c28d64df01f2abf77c1625570f29e0c3 100644 (file)
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -259,6 +259,8 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant) {
       LastEmitted = VarEnd;
     }
   }
+
+  AddLiteralString("\\n");
 }
 
 /// MatchesAllButOneOp - If this instruction is exactly identical to the
@@ -355,6 +357,7 @@ static void EmitInstructions(std::vector<AsmWriterInst> &Insts,
     }
     O << "\n";
   }
+
   O << "    break;\n";
 }
 
@@ -382,12 +385,8 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
     Command = "    " + Inst->Operands[0].getCode() + "\n";
 
     // If this is the last operand, emit a return.
-    if (Inst->Operands.size() == 1) {
-      Command += "    EmitComments(*MI);\n";
-      // Print the final newline
-      Command += "    O << \"\\n\";\n";
+    if (Inst->Operands.size() == 1)
       Command += "    return true;\n";
-    }
     
     // Check to see if we already have 'Command' in UniqueOperandCommands.
     // If not, add it.
@@ -453,12 +452,8 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
       std::string Command = "    " + FirstInst->Operands[Op].getCode() + "\n";
       
       // If this is the last operand, emit a return after the code.
-      if (FirstInst->Operands.size() == Op+1) {
-        Command += "    EmitComments(*MI);\n";
-        // Print the final newline
-        Command += "    O << \"\\n\";\n";
+      if (FirstInst->Operands.size() == Op+1)
         Command += "    return true;\n";
-      }
       
       UniqueOperandCommands[CommandIdx] += Command;
       InstOpsUsed[CommandIdx]++;
@@ -569,11 +564,10 @@ void AsmWriterEmitter::run(raw_ostream &O) {
     // For the first operand check, add a default value for instructions with
     // just opcode strings to use.
     if (isFirst) {
-      // Do the post instruction processing and print the final newline
-      UniqueOperandCommands.push_back("    EmitComments(*MI);\n    O << \"\\n\";\n    return true;\n");
+      UniqueOperandCommands.push_back("    return true;\n");
       isFirst = false;
     }
-
+    
     std::vector<unsigned> InstIdxs;
     std::vector<unsigned> NumInstOpsHandled;
     FindUniqueOperandCommands(UniqueOperandCommands, InstIdxs,
@@ -745,9 +739,6 @@ void AsmWriterEmitter::run(raw_ostream &O) {
       EmitInstructions(Instructions, O);
 
     O << "  }\n";
-    O << "  EmitComments(*MI);\n";
-    // Print the final newline
-    O << "  O << \"\\n\";\n";
     O << "  return true;\n";
   }