Apply twice the negative bias on transparent blocks when computing the
compact regions. This excludes loop backedges from the region when only
one of the loop blocks uses the register.
Previously, we would include the backedge in the region if the loop
preheader and the loop latch both used the register, but the loop header
didn't.
When both the header and latch blocks use the register, we still keep it
live on the backedge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136832
91177308-0d34-0410-b5e6-
96231b3b80d8
if (Cand.PhysReg)
addThroughConstraints(Cand.Intf, NewBlocks);
else
- SpillPlacer->addPrefSpill(NewBlocks);
+ // Provide a strong negative bias on through blocks to prevent unwanted
+ // liveness on loop backedges.
+ SpillPlacer->addPrefSpill(NewBlocks, /* Strong= */ true);
AddedTo = ActiveBlocks.size();
// Perhaps iterating can enable more bundles?
}
/// addPrefSpill - Same as addConstraints(PrefSpill)
-void SpillPlacement::addPrefSpill(ArrayRef<unsigned> Blocks) {
+void SpillPlacement::addPrefSpill(ArrayRef<unsigned> Blocks, bool Strong) {
for (ArrayRef<unsigned>::iterator I = Blocks.begin(), E = Blocks.end();
I != E; ++I) {
float Freq = getBlockFrequency(*I);
+ if (Strong)
+ Freq += Freq;
unsigned ib = bundles->getBundle(*I, 0);
unsigned ob = bundles->getBundle(*I, 1);
activate(ib);
/// Entry = Exit = PrefSpill, and ChangesValue = false.
///
/// @param Blocks Array of block numbers that prefer to spill in and out.
- void addPrefSpill(ArrayRef<unsigned> Blocks);
+ /// @param Strong When true, double the negative bias for these blocks.
+ void addPrefSpill(ArrayRef<unsigned> Blocks, bool Strong);
/// addLinks - Add transparent blocks with the given numbers.
void addLinks(ArrayRef<unsigned> Links);