Be a little more specific about what is begin generated. Only print

command line if VERBOSE=1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8453 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile
index 84f168a93711d89bb0cfa6975aaf0ec7bc053998..87522ec5d3bf15d17c5f9573a9eaa6f181aa9b43 100644 (file)
--- a/lib/Target/X86/Makefile
+++ b/lib/Target/X86/Makefile
@@ -8,28 +8,28 @@ $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
                  X86GenInstrInfo.inc X86GenInstrSelector.inc
 
 X86GenRegisterNames.inc::  X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
-       @echo "Tblgen'ing $<"
-       $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
+       @echo "Building $< register names with tblgen"
+       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
 
 X86GenRegisterInfo.h.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
-       @echo "Tblgen'ing $<"
-       $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
+       @echo "Building $< register information header with tblgen"
+       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
 
 X86GenRegisterInfo.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
-       @echo "Tblgen'ing $<"
-       $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
+       @echo "Building $< register information implementation with tblgen"
+       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
 
 X86GenInstrNames.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
-       @echo "Tblgen'ing $<"
-       $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
+       @echo "Building $< instruction names with tblgen"
+       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
 
 X86GenInstrInfo.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
-       @echo "Tblgen'ing $<"
-       $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
+       @echo "Building $< instruction information with tblgen"
+       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
 
 X86GenInstrSelector.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
-       @echo "Tblgen'ing $<"
-       $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
+       @echo "Building $< instruction selector with tblgen"
+       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
 
 clean::
        $(VERB) rm -f *.inc