let isIndirectBranch = 1;
}
+// 16-bit Jump and Link (Call) - Short Delay Slot
+class JumpLinkRegSMM16<string opstr, RegisterOperand RO> :
+ MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
+ [], IIBranch, FrmR> {
+ let isCall = 1;
+ let hasDelaySlot = 1;
+ let Defs = [RA];
+}
+
// MicroMIPS Jump and Link (Call) - Short Delay Slot
let isCall = 1, hasDelaySlot = 1, Defs = [RA] in {
class JumpLinkMM<string opstr, DAGOperand opnd> :
def MFLO16_MM : MoveFromHILOMM<"mflo", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x12>;
def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>;
def JALR16_MM : JumpLinkRegMM16<"jalr", GPR32Opnd>, JALR_FM_MM16<0x0e>;
+def JALRS16_MM : JumpLinkRegSMM16<"jalrs16", GPR32Opnd>, JALR_FM_MM16<0x0f>;
def JRADDIUSP : JumpRAddiuStackMM16, JRADDIUSP_FM_MM16<0x18>;
class WaitMM<string opstr> :
# CHECK-EL: jalr $9 # encoding: [0xc9,0x45]
# CHECK-EL: jraddiusp 20 # encoding: [0x05,0x47]
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EL: jalrs16 $9 # encoding: [0xe9,0x45]
+# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
#------------------------------------------------------------------------------
# Big endian
#------------------------------------------------------------------------------
# CHECK-EB: jalr $9 # encoding: [0x45,0xc9]
# CHECK-EB: jraddiusp 20 # encoding: [0x47,0x05]
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EB: jalrs16 $9 # encoding: [0x45,0xe9]
+# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
mfhi $9
mflo $9
move $25, $1
jalr $9
jraddiusp 20
+ jalrs16 $9