Ensuring that both bits are set, and not just a combination of one or the other.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178674 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Support/Host.cpp b/lib/Support/Host.cpp
index fef66e634f989352bc4f3dd3841d509aecd22169..73d98d148746ef64636dbec2c308ea775b2c6612 100644 (file)
--- a/lib/Support/Host.cpp
+++ b/lib/Support/Host.cpp
@@ -152,7 +152,8 @@ std::string sys::getHostCPUName() {
   // If CPUID indicates support for XSAVE, XRESTORE and AVX, and XGETBV 
   // indicates that the AVX registers will be saved and restored on context
   // switch, then we have full AVX support.
-  bool HasAVX = (ECX & ((1 << 28) | (1 << 27))) != 0 && OSHasAVXSupport();
+  const unsigned AVXBits = (1 << 27) | (1 << 28);
+  bool HasAVX = ((ECX & AVXBits) == AVXBits) && OSHasAVXSupport();
   GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
   bool Em64T = (EDX >> 29) & 0x1;