Doh. ARM::PC is obvious a reserved register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index 2c53bfd6938f177edab19757d51633aa4ae7917c..3dac8b030b3747acc5abf2798b7a6f9c3b17e029 100644 (file)
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -315,6 +315,7 @@ ARMRegisterInfo::getCalleeSavedRegClasses() const {
 BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   BitVector Reserved(getNumRegs());
   Reserved.set(ARM::SP);
+  Reserved.set(ARM::PC);
   if (STI.isTargetDarwin() || hasFP(MF))
     Reserved.set(FramePtr);
   // Some targets reserve R9.