Simplify SelectRoot's interface, and factor out some common code

from all targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55124 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/DAGISelHeader.h b/include/llvm/CodeGen/DAGISelHeader.h
index 48050edc06ea502975788bf5cad985568e67655d..d67b8fe0f6621e4ee75f76b894d9193f62432475 100644 (file)
--- a/include/llvm/CodeGen/DAGISelHeader.h
+++ b/include/llvm/CodeGen/DAGISelHeader.h
@@ -153,7 +153,7 @@ void ReplaceUses(SDNode *F, SDNode *T) DISABLE_INLINE {
 
 /// SelectRoot - Top level entry to DAG instruction selector.
 /// Selects instructions starting at the root of the current DAG.
-SDValue SelectRoot(SDValue Root) {
+void SelectRoot() {
   SelectRootInit();
   unsigned NumBytes = (DAGSize + 7) / 8;
   ISelQueued   = new unsigned char[NumBytes];
@@ -197,7 +197,7 @@ SDValue SelectRoot(SDValue Root) {
   ISelQueued = NULL;
   delete[] ISelSelected;
   ISelSelected = NULL;
-  return Dummy.getValue();
+  CurDAG->setRoot(Dummy.getValue());
 }
 
 #endif /* LLVM_CODEGEN_DAGISEL_HEADER_H */

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index b79fffe16f44e10e15d79048c5f45cfc1d98761c..ad1f63d642f9c1f0363261c530464220c138747f 100644 (file)
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -94,7 +94,7 @@ public:
 void ARMDAGToDAGISel::InstructionSelect(SelectionDAG &DAG) {
   DEBUG(BB->dump());
 
-  DAG.setRoot(SelectRoot(DAG.getRoot()));
+  SelectRoot();
   DAG.RemoveDeadNodes();
 }
 

diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 89dee2a4fa5f39a59b5a2a4fb117d8fca120998e..0ff735d28eb78b87ac56aa5f7e9fe5a088c28e1a 100644 (file)
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -236,7 +236,7 @@ void AlphaDAGToDAGISel::InstructionSelect(SelectionDAG &DAG) {
   DEBUG(BB->dump());
   
   // Select target instructions for the DAG.
-  DAG.setRoot(SelectRoot(DAG.getRoot()));
+  SelectRoot();
   DAG.RemoveDeadNodes();
 }
 

diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
index 84a1bd8542452360e75b763f8dd7c2bba7f707b4..c8d04b46cb58ab9e7f0c0ef013bfd143cf68dcf1 100644 (file)
--- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
+++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
@@ -347,7 +347,7 @@ SPUDAGToDAGISel::InstructionSelect(SelectionDAG &DAG)
   DEBUG(BB->dump());
 
   // Select target instructions for the DAG.
-  DAG.setRoot(SelectRoot(DAG.getRoot()));
+  SelectRoot();
   DAG.RemoveDeadNodes();
 }
 

diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
index c5c311466d7330021e722cb55bd104b9cf06afc0..8173e96ccbfc9c6b2f37daaf20d8fa3c2cf63b40 100644 (file)
--- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp
+++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
@@ -100,7 +100,7 @@ void IA64DAGToDAGISel::InstructionSelect(SelectionDAG &DAG) {
   DEBUG(BB->dump());
 
   // Select target instructions for the DAG.
-  DAG.setRoot(SelectRoot(DAG.getRoot()));
+  SelectRoot();
   DAG.RemoveDeadNodes();
 }
 

diff --git a/lib/Target/Mips/MipsISelDAGToDAG.cpp b/lib/Target/Mips/MipsISelDAGToDAG.cpp
index f463d3ad7d129fac26cef133599971041c598727..94fdb3526db36454a6703954a3a740e62e922ffe 100644 (file)
--- a/lib/Target/Mips/MipsISelDAGToDAG.cpp
+++ b/lib/Target/Mips/MipsISelDAGToDAG.cpp
@@ -113,7 +113,7 @@ InstructionSelect(SelectionDAG &SD)
   #endif
 
   // Select target instructions for the DAG.
-  SD.setRoot(SelectRoot(SD.getRoot()));
+  SelectRoot();
 
   #ifndef NDEBUG
   DOUT << "===== Instruction selection ends:\n";

diff --git a/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp b/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
index ba002bd0e32fe692343c1ce4613430569253bdee..f1eaa39155d59f720453c0d9bc50837f00cb5f95 100644 (file)
--- a/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
+++ b/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
@@ -109,7 +109,7 @@ void PIC16DAGToDAGISel::InstructionSelect(SelectionDAG &SD)
 #endif
 
   // Select target instructions for the DAG.
-  SD.setRoot(SelectRoot(SD.getRoot()));
+  SelectRoot();
 
   DOUT << "===== Instruction selection ends:\n";
 

diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 65ab4d2a5bd41f590e64000619a8fc411d0722b9..c64795543466ece7435ea834b3c8c4380150b5fb 100644 (file)
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -207,7 +207,7 @@ void PPCDAGToDAGISel::InstructionSelect(SelectionDAG &DAG) {
   DEBUG(BB->dump());
 
   // Select target instructions for the DAG.
-  DAG.setRoot(SelectRoot(DAG.getRoot()));
+  SelectRoot();
   DAG.RemoveDeadNodes();
 }
 

diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 7d2d11ec7220b015dd1a7836f7dc24684574ec92..f62387307d179e3c0dacde4559fb40f8ec13eb82 100644 (file)
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -66,7 +66,7 @@ void SparcDAGToDAGISel::InstructionSelect(SelectionDAG &DAG) {
   DEBUG(BB->dump());
   
   // Select target instructions for the DAG.
-  DAG.setRoot(SelectRoot(DAG.getRoot()));
+  SelectRoot();
   DAG.RemoveDeadNodes();
 }
 

diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 13ed07c04c7a8273da0a7660b8f32ed94cd7e76b..21837d53d4331fb32aa22f0aade565555f0abb24 100644 (file)
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -592,7 +592,7 @@ void X86DAGToDAGISel::InstructionSelect(SelectionDAG &DAG) {
   DOUT << "===== Instruction selection begins:\n";
   Indent = 0;
 #endif
-  DAG.setRoot(SelectRoot(DAG.getRoot()));
+  SelectRoot();
 #ifndef NDEBUG
   DOUT << "===== Instruction selection ends:\n";
 #endif