Updating VC++ project.

Adding one include file and correct one declaration from class to struct in order to make llvm compile on VC2005.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55279 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Value.h b/include/llvm/Value.h
index ceb1ad246d59e996d56229b4ffb65c358851aa63..b86d1374ebc9bf11d78e4d7e1bba56c45b2d8409 100644 (file)
--- a/include/llvm/Value.h
+++ b/include/llvm/Value.h
@@ -36,7 +36,7 @@ class TypeSymbolTable;
 template<typename ValueTy> class StringMapEntry;
 typedef StringMapEntry<Value*> ValueName;
 class raw_ostream;
-class AssemblyAnnotationWriter;
+struct AssemblyAnnotationWriter;
 
 //===----------------------------------------------------------------------===//
 //                                 Value Class

diff --git a/lib/Support/raw_ostream.cpp b/lib/Support/raw_ostream.cpp
index b9beac2869aa4e8c118d2b32713a74a8ca0d50aa..008f85603eeae319a21b5a04c113313ec32be497 100644 (file)
--- a/lib/Support/raw_ostream.cpp
+++ b/lib/Support/raw_ostream.cpp
@@ -26,6 +26,7 @@
 
 #if defined(_MSC_VER)
 #include <io.h>
+#include <fcntl.h>
 #ifndef STDIN_FILENO
 # define STDIN_FILENO 0
 #endif

diff --git a/win32/CodeGen/CodeGen.vcproj b/win32/CodeGen/CodeGen.vcproj
index 47855c6d1a6c99ab63c5a225af18ccb58cf8b6a0..37ba872ba7fd5a5b0401b9f4b32a6f021cc1a7c3 100644 (file)
--- a/win32/CodeGen/CodeGen.vcproj
+++ b/win32/CodeGen/CodeGen.vcproj
@@ -89,11 +89,11 @@
                        />
                </Configuration>
                <Configuration
-                       Name="Debug|x64"
+                       Name="Release|Win32"
                        OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
                        IntermediateDirectory="$(PlatformName)\$(ConfigurationName)"
                        ConfigurationType="4"
-                       InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
+                       InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops;..\common.vsprops"
                        CharacterSet="2"
                        >
                        <Tool
@@ -110,22 +110,17 @@
                        />
                        <Tool
                                Name="VCMIDLTool"
-                               TargetEnvironment="3"
                        />
                        <Tool
                                Name="VCCLCompilerTool"
-                               Optimization="0"
                                AdditionalIncludeDirectories="..\..\include;.."
-                               PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;_CRT_SECURE_NO_WARNINGS;_SCL_SECURE_NO_WARNINGS;_CRT_NONSTDC_NO_WARNINGS;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS"
+                               PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;_CRT_SECURE_NO_WARNINGS;_SCL_SECURE_NO_WARNINGS;_CRT_NONSTDC_NO_WARNINGS;WIN32;NDEBUG;_LIB;__STDC_LIMIT_MACROS"
                                StringPooling="true"
-                               MinimalRebuild="true"
-                               BasicRuntimeChecks="3"
-                               RuntimeLibrary="3"
+                               RuntimeLibrary="2"
                                ForceConformanceInForLoopScope="true"
                                RuntimeTypeInfo="true"
                                UsePrecompiledHeader="0"
                                ProgramDataBaseFileName="$(OutDir)\$(ProjectName).pdb"
-                               BrowseInformation="1"
                                WarningLevel="3"
                                Detect64BitPortabilityProblems="false"
                                DebugInformationFormat="3"
@@ -161,11 +156,11 @@
                        />
                </Configuration>
                <Configuration
-                       Name="Release|Win32"
+                       Name="Debug|x64"
                        OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
                        IntermediateDirectory="$(PlatformName)\$(ConfigurationName)"
                        ConfigurationType="4"
-                       InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops;..\common.vsprops"
+                       InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
                        CharacterSet="2"
                        >
                        <Tool
@@ -182,17 +177,22 @@
                        />
                        <Tool
                                Name="VCMIDLTool"
+                               TargetEnvironment="3"
                        />
                        <Tool
                                Name="VCCLCompilerTool"
+                               Optimization="0"
                                AdditionalIncludeDirectories="..\..\include;.."
-                               PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;_CRT_SECURE_NO_WARNINGS;_SCL_SECURE_NO_WARNINGS;_CRT_NONSTDC_NO_WARNINGS;WIN32;NDEBUG;_LIB;__STDC_LIMIT_MACROS"
+                               PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;_CRT_SECURE_NO_WARNINGS;_SCL_SECURE_NO_WARNINGS;_CRT_NONSTDC_NO_WARNINGS;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS"
                                StringPooling="true"
-                               RuntimeLibrary="2"
+                               MinimalRebuild="true"
+                               BasicRuntimeChecks="3"
+                               RuntimeLibrary="3"
                                ForceConformanceInForLoopScope="true"
                                RuntimeTypeInfo="true"
                                UsePrecompiledHeader="0"
                                ProgramDataBaseFileName="$(OutDir)\$(ProjectName).pdb"
+                               BrowseInformation="1"
                                WarningLevel="3"
                                Detect64BitPortabilityProblems="false"
                                DebugInformationFormat="3"
@@ -503,6 +503,10 @@
                                        RelativePath="..\..\lib\CodeGen\SelectionDAG\DAGCombiner.cpp"
                                        >
                                </File>
+                               <File
+                                       RelativePath="..\..\lib\CodeGen\SelectionDAG\FastISel.cpp"
+                                       >
+                               </File>
                                <File
                                        RelativePath="..\..\lib\CodeGen\SelectionDAG\LegalizeDAG.cpp"
                                        >
@@ -551,10 +555,6 @@
                                        RelativePath="..\..\lib\CodeGen\SelectionDAG\SelectionDAGPrinter.cpp"
                                        >
                                </File>
-                               <File
-                                       RelativePath="..\..\lib\CodeGen\SelectionDAG\SimpleBBISel.cpp"
-                                       >
-                               </File>
                                <File
                                        RelativePath="..\..\lib\CodeGen\SelectionDAG\TargetLowering.cpp"
                                        >

diff --git a/win32/Transforms/Transforms.vcproj b/win32/Transforms/Transforms.vcproj
index ef57d430b11ac81bac3b2f078afe45d6ef4bbcd3..101c04e8598efea4a467b16ec1276d8dea41117a 100644 (file)
--- a/win32/Transforms/Transforms.vcproj
+++ b/win32/Transforms/Transforms.vcproj
@@ -601,6 +601,10 @@
                                        RelativePath="..\..\lib\Transforms\Utils\InlineFunction.cpp"
                                        >
                                </File>
+                               <File
+                                       RelativePath="..\..\lib\Transforms\Utils\InstructionNamer.cpp"
+                                       >
+                               </File>
                                <File
                                        RelativePath="..\..\lib\Transforms\Utils\LCSSA.cpp"
                                        >

diff --git a/win32/x86/x86.vcproj b/win32/x86/x86.vcproj
index 78801743eee47a25c147bdc1558b8dc1e6d500ea..57cd1b79484e34e47d57ba0cb39c76e4c49925dc 100644 (file)
--- a/win32/x86/x86.vcproj
+++ b/win32/x86/x86.vcproj
@@ -314,9 +314,9 @@
                                        <Tool
                                                Name="VCCustomBuildTool"
                                                Description="Performing TableGen Step"
-                                               CommandLine="echo Building $(InputFileName) register names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc&#x0D;&#x0A;echo Building $(InputFileName) register information header with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc&#x0D;&#x0A;echo Building $(InputFileName) register information implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer #1 with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction selector implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc&#x0D;&#x0A;echo Building $(InputFileName) subtarget information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc&#x0D;&#x0A;echo Building $(InputFileName) calling convention information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc&#x0D;&#x0A;"
+                                               CommandLine="echo Building $(InputFileName) register names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc&#x0D;&#x0A;echo Building $(InputFileName) register information header with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc&#x0D;&#x0A;echo Building $(InputFileName) register information implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer #1 with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction selector implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc&#x0D;&#x0A;echo Building $(InputFileName) subtarget information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc&#x0D;&#x0A;echo Building $(InputFileName) calling convention information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc&#x0D;&#x0A;echo Building $(InputFileName) Fast instruction selection with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc&#x0D;&#x0A;"
                                                AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
-                                               Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
+                                               Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
                                        />
                                </FileConfiguration>
                                <FileConfiguration
@@ -325,9 +325,9 @@
                                        <Tool
                                                Name="VCCustomBuildTool"
                                                Description="Performing TableGen Step"
-                                               CommandLine="echo Building $(InputFileName) register names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc&#x0D;&#x0A;echo Building $(InputFileName) register information header with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc&#x0D;&#x0A;echo Building $(InputFileName) register information implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer #1 with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction selector implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc&#x0D;&#x0A;echo Building $(InputFileName) subtarget information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc&#x0D;&#x0A;echo Building $(InputFileName) calling convention information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc&#x0D;&#x0A;"
+                                               CommandLine="echo Building $(InputFileName) register names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc&#x0D;&#x0A;echo Building $(InputFileName) register information header with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc&#x0D;&#x0A;echo Building $(InputFileName) register information implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer #1 with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction selector implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc&#x0D;&#x0A;echo Building $(InputFileName) subtarget information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc&#x0D;&#x0A;echo Building $(InputFileName) calling convention information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc&#x0D;&#x0A;echo Building $(InputFileName) Fast instruction selection with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc&#x0D;&#x0A;"
                                                AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
-                                               Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
+                                               Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
                                        />
                                </FileConfiguration>
                                <FileConfiguration
@@ -336,9 +336,9 @@
                                        <Tool
                                                Name="VCCustomBuildTool"
                                                Description="Performing TableGen Step"
-                                               CommandLine="echo Building $(InputFileName) register names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc&#x0D;&#x0A;echo Building $(InputFileName) register information header with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc&#x0D;&#x0A;echo Building $(InputFileName) register information implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer #1 with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction selector implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc&#x0D;&#x0A;echo Building $(InputFileName) subtarget information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc&#x0D;&#x0A;echo Building $(InputFileName) calling convention information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc&#x0D;&#x0A;"
+                                               CommandLine="echo Building $(InputFileName) register names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc&#x0D;&#x0A;echo Building $(InputFileName) register information header with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc&#x0D;&#x0A;echo Building $(InputFileName) register information implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer #1 with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction selector implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc&#x0D;&#x0A;echo Building $(InputFileName) subtarget information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc&#x0D;&#x0A;echo Building $(InputFileName) calling convention information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc&#x0D;&#x0A;echo Building $(InputFileName) Fast instruction selection with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc&#x0D;&#x0A;"
                                                AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
-                                               Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
+                                               Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
                                        />
                                </FileConfiguration>
                                <FileConfiguration
@@ -347,9 +347,9 @@
                                        <Tool
                                                Name="VCCustomBuildTool"
                                                Description="Performing TableGen Step"
-                                               CommandLine="echo Building $(InputFileName) register names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc&#x0D;&#x0A;echo Building $(InputFileName) register information header with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc&#x0D;&#x0A;echo Building $(InputFileName) register information implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer #1 with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction selector implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc&#x0D;&#x0A;echo Building $(InputFileName) subtarget information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc&#x0D;&#x0A;echo Building $(InputFileName) calling convention information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc&#x0D;&#x0A;"
+                                               CommandLine="echo Building $(InputFileName) register names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc&#x0D;&#x0A;echo Building $(InputFileName) register information header with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc&#x0D;&#x0A;echo Building $(InputFileName) register information implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction names with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc&#x0D;&#x0A;echo Building $(InputFileName) assembly writer #1 with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc&#x0D;&#x0A;echo Building $(InputFileName) instruction selector implementation with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc&#x0D;&#x0A;echo Building $(InputFileName) subtarget information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc&#x0D;&#x0A;echo Building $(InputFileName) calling convention information with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc&#x0D;&#x0A;echo Building $(InputFileName) Fast instruction selection with tblgen&#x0D;&#x0A;$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc&#x0D;&#x0A;"
                                                AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
-                                               Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
+                                               Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
                                        />
                                </FileConfiguration>
                        </File>
@@ -391,6 +391,14 @@
                                RelativePath="..\..\lib\Target\X86\X86ELFWriterInfo.h"
                                >
                        </File>
+                       <File
+                               RelativePath="..\..\lib\Target\X86\X86FastISel.cpp"
+                               >
+                       </File>
+                       <File
+                               RelativePath="..\..\lib\Target\X86\X86FastISel.h"
+                               >
+                       </File>
                        <File
                                RelativePath="..\..\lib\Target\X86\X86FloatingPoint.cpp"
                                >
@@ -557,6 +565,10 @@
                <Filter
                        Name="Generated Tablegen Files"
                        >
+                       <File
+                               RelativePath=".\X86GenFastISel.inc"
+                               >
+                       </File>
                        <File
                                RelativePath=".\X86GenAsmWriter.inc"
                                >