const SubtargetInfoKV *ProcItins; // Scheduling itineraries
const InstrStage *Stages; // Instruction stages
const unsigned *OperandCycles; // Operand cycles
- const unsigned *ForwardingPathes; // Forwarding pathes
+ const unsigned *ForwardingPaths; // Forwarding paths
unsigned NumFeatures; // Number of processor features
unsigned NumProcs; // Number of processors
uint64_t FeatureBits; // Feature bits for current CPU + FS
ProcItins = PI;
Stages = IS;
OperandCycles = OC;
- ForwardingPathes = FP;
+ ForwardingPaths = FP;
NumFeatures = NF;
NumProcs = NP;
InstrItinerarySubtargetValue *V =
(InstrItinerarySubtargetValue *)Found->Value;
- return InstrItineraryData(V->Props, Stages, OperandCycles, ForwardingPathes,
+ return InstrItineraryData(V->Props, Stages, OperandCycles, ForwardingPaths,
V->Itineraries);
}
// Begin pipeline bypass table
std::string BypassTable = "extern const unsigned " + Target +
- "ForwardingPathes[] = {\n";
+ "ForwardingPaths[] = {\n";
BypassTable += " 0, // No itinerary\n";
unsigned StageCount = 1, OperandCycleCount = 1;
OS << Target << "ProcItinKV, "
<< Target << "Stages, "
<< Target << "OperandCycles, "
- << Target << "ForwardingPathes, ";
+ << Target << "ForwardingPaths, ";
} else
OS << "0, 0, 0, 0, ";
OS << NumFeatures << ", " << NumProcs << ");\n}\n\n";
OS << "extern const llvm::SubtargetInfoKV " << Target << "ProcItinKV[];\n";
OS << "extern const llvm::InstrStage " << Target << "Stages[];\n";
OS << "extern const unsigned " << Target << "OperandCycles[];\n";
- OS << "extern const unsigned " << Target << "ForwardingPathes[];\n";
+ OS << "extern const unsigned " << Target << "ForwardingPaths[];\n";
}
OS << ClassName << "::" << ClassName << "(StringRef TT, StringRef CPU, "
OS << Target << "ProcItinKV, "
<< Target << "Stages, "
<< Target << "OperandCycles, "
- << Target << "ForwardingPathes, ";
+ << Target << "ForwardingPaths, ";
} else
OS << "0, 0, 0, 0, ";
OS << NumFeatures << ", " << NumProcs << ");\n}\n\n";