Flip the new block-placement pass to be on by default.

This is mostly to test the waters. I'd like to get results from FNT
build bots and other bots running on non-x86 platforms.

This feature has been pretty heavily tested over the last few months by
me, and it fixes several of the execution time regressions caused by the
inlining work by preventing inlining decisions from radically impacting
block layout.

I've seen very large improvements in yacr2 and ackermann benchmarks,
along with the expected noise across all of the benchmark suite whenever
code layout changes. I've analyzed all of the regressions and fixed
them, or found them to be impossible to fix. See my email to llvmdev for
more details.

I'd like for this to be in 3.1 as it complements the inliner changes,
but if any failures are showing up or anyone has concerns, it is just
a flag flip and so can be easily turned off.

I'm switching it on tonight to try and get at least one run through
various folks' performance suites in case SPEC or something else has
serious issues with it. I'll watch bots and revert if anything shows up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154816 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/Passes.cpp b/lib/CodeGen/Passes.cpp
index 53d1fcf7377ad524e15ef4b44c40d9d80af0a3c4..13d1bbc310284e30428b5b0d56b844ef696eb3d9 100644 (file)
--- a/lib/CodeGen/Passes.cpp
+++ b/lib/CodeGen/Passes.cpp
@@ -37,8 +37,9 @@ static cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hidden,
     cl::desc("Disable tail duplication"));
 static cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidden,
     cl::desc("Disable pre-register allocation tail duplication"));
-static cl::opt<bool> EnableBlockPlacement("enable-block-placement",
-    cl::Hidden, cl::desc("Enable probability-driven block placement"));
+static cl::opt<bool> DisableBlockPlacement("disable-block-placement",
+    cl::Hidden, cl::desc("Disable the probability-driven block placement, and "
+                         "re-enable the old code placement pass"));
 static cl::opt<bool> EnableBlockPlacementStats("enable-block-placement-stats",
     cl::Hidden, cl::desc("Collect probability-driven block placement stats"));
 static cl::opt<bool> DisableCodePlace("disable-code-place", cl::Hidden,
@@ -610,10 +611,10 @@ void TargetPassConfig::addMachineLateOptimization() {
 /// Add standard basic block placement passes.
 void TargetPassConfig::addBlockPlacement() {
   AnalysisID ID = &NoPassID;
-  if (EnableBlockPlacement) {
-    // MachineBlockPlacement is an experimental pass which is disabled by
-    // default currently. Eventually it should subsume CodePlacementOpt, so
-    // when enabled, the other is disabled.
+  if (!DisableBlockPlacement) {
+    // MachineBlockPlacement is a new pass which subsumes the functionality of
+    // CodPlacementOpt. The old code placement pass can be restored by
+    // disabling block placement, but eventually it will be removed.
     ID = addPass(MachineBlockPlacementID);
   } else {
     ID = addPass(CodePlacementOptID);

diff --git a/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll b/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll
index 7c9af6f5e59026b37cb6775bb79661d23d32c1cc..0fe88bd0ed7e6edb22f5e7704910f27e9d56e561 100644 (file)
--- a/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll
+++ b/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll
@@ -26,7 +26,7 @@ bb2:                                              ; preds = %bb1, %entry
 ; CHECK: bb2
 ; CHECK: subs [[REG:r[0-9]+]], #1
 ; CHECK: cmp [[REG]], #0
-; CHECK: bgt
+; CHECK: ble
   %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
   %tries.0 = sub i32 2147483647, %indvar
   %tmp1 = icmp sgt i32 %tries.0, 0

diff --git a/test/CodeGen/ARM/tail-opts.ll b/test/CodeGen/ARM/tail-opts.ll
index 3dc77e2a8086c5ececba6ae36dad9f92f0ae916a..220b0f17373981ccaf7b3fbf55000481ab06ca1c 100644 (file)
--- a/test/CodeGen/ARM/tail-opts.ll
+++ b/test/CodeGen/ARM/tail-opts.ll
@@ -16,11 +16,11 @@ declare i8* @choose(i8*, i8*)
 
 ; CHECK: tail_duplicate_me:
 ; CHECK:      qux
-; CHECK:      qux
 ; CHECK:      movw r{{[0-9]+}}, :lower16:_GHJK
 ; CHECK:      movt r{{[0-9]+}}, :upper16:_GHJK
 ; CHECK:      str r
 ; CHECK-NEXT: bx r
+; CHECK:      qux
 ; CHECK:      movw r{{[0-9]+}}, :lower16:_GHJK
 ; CHECK:      movt r{{[0-9]+}}, :upper16:_GHJK
 ; CHECK:      str r

diff --git a/test/CodeGen/CellSPU/2009-01-01-BrCond.ll b/test/CodeGen/CellSPU/2009-01-01-BrCond.ll
index 58e3190454f89e4d054a30d6fba3665294cd4010..35422311c57433c836143b6e4d1b93ae673f623b 100644 (file)
--- a/test/CodeGen/CellSPU/2009-01-01-BrCond.ll
+++ b/test/CodeGen/CellSPU/2009-01-01-BrCond.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=cellspu -o - | grep brnz
+; RUN: llc < %s -march=cellspu -o - | grep brz
 ; PR3274
 
 target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128"

diff --git a/test/CodeGen/Mips/analyzebranch.ll b/test/CodeGen/Mips/analyzebranch.ll
index 8f0bdf286c527e1e5ddef6fd35f62cac381a258c..bc5bcc391ba30ddc4938f61fcdf4be850352d60d 100644 (file)
--- a/test/CodeGen/Mips/analyzebranch.ll
+++ b/test/CodeGen/Mips/analyzebranch.ll
@@ -26,9 +26,9 @@ return:                                           ; preds = %if.else, %if.end6
 
 define void @f1(float %f) nounwind {
 entry:
-; CHECK: bc1t $BB1_2
+; CHECK: bc1f $BB1_1
 ; CHECK: nop
-; CHECK: # BB#1:      
+; CHECK: # BB#2:
   %cmp = fcmp une float %f, 0.000000e+00
   br i1 %cmp, label %if.then, label %if.end
 

diff --git a/test/CodeGen/Mips/eh.ll b/test/CodeGen/Mips/eh.ll
index c3facdbc5556acbd007135fc5c39beb3c3ea338b..2e2f9a451ed1b5a472c2ffe5a3f27d5467a1e09e 100644 (file)
--- a/test/CodeGen/Mips/eh.ll
+++ b/test/CodeGen/Mips/eh.ll
@@ -26,7 +26,7 @@ entry:
 lpad:                                             ; preds = %entry
 ; CHECK-EL:  # %lpad
 ; CHECK-EL:  lw  $gp
-; CHECK-EL:  beq $5
+; CHECK-EL:  bne $5
 
   %exn.val = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0
            catch i8* bitcast (i8** @_ZTId to i8*)

diff --git a/test/CodeGen/Mips/fpbr.ll b/test/CodeGen/Mips/fpbr.ll
index 0a6478b0f8f039eea5f8b2deb25ce1e2379393cc..a136557cc4a36e8c6ccc2c782847338d65530899 100644 (file)
--- a/test/CodeGen/Mips/fpbr.ll
+++ b/test/CodeGen/Mips/fpbr.ll
@@ -45,7 +45,7 @@ if.end:                                           ; preds = %if.else, %if.then
 define void @func2(float %f2, float %f3) nounwind {
 entry:
 ; CHECK: c.ole.s
-; CHECK: bc1f
+; CHECK: bc1t
   %cmp = fcmp ugt float %f2, %f3
   br i1 %cmp, label %if.else, label %if.then
 
@@ -102,7 +102,7 @@ if.end:                                           ; preds = %if.else, %if.then
 define void @func5(double %f2, double %f3) nounwind {
 entry:
 ; CHECK: c.ole.d
-; CHECK: bc1f
+; CHECK: bc1t
   %cmp = fcmp ugt double %f2, %f3
   br i1 %cmp, label %if.else, label %if.then
 

diff --git a/test/CodeGen/Thumb2/thumb2-branch.ll b/test/CodeGen/Thumb2/thumb2-branch.ll
index 27d8e8fb40864b51b6c8ebd8edbbb8ce29863b6e..f1c097c1892d2824852e4e9e5ee858f0f11e178b 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-branch.ll
+++ b/test/CodeGen/Thumb2/thumb2-branch.ll
@@ -58,8 +58,8 @@ define i32 @f4(i32 %a, i32 %b, i32* %v) {
 entry:
 ; CHECK: f4:
 ; CHECK: blo LBB
-        %tmp = icmp ult i32 %a, %b              ; <i1> [#uses=1]
-        br i1 %tmp, label %return, label %cond_true
+        %tmp = icmp uge i32 %a, %b              ; <i1> [#uses=1]
+        br i1 %tmp, label %cond_true, label %return
 
 cond_true:              ; preds = %entry
         fence seq_cst

diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt2.ll b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll
index f577f79d6917c524846821eb3fe01a56ca6bc9f9..9a83e655762b0dd5c1e3e9eabb745bf522359f6c 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-ifcvt2.ll
+++ b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll
@@ -29,13 +29,13 @@ declare i32 @bar(...)
 define fastcc i32 @CountTree(%struct.quad_struct* %tree) {
 entry:
 ; CHECK: CountTree:
-; CHECK: it eq
-; CHECK: cmpeq
-; CHECK: bne
-; CHECK: cmp
 ; CHECK: itt eq
 ; CHECK: moveq
 ; CHECK: popeq
+; CHECK: bne
+; CHECK: cmp
+; CHECK: it eq
+; CHECK: cmpeq
        br label %tailrecurse
 
 tailrecurse:           ; preds = %bb, %entry
@@ -83,7 +83,7 @@ define fastcc void @t2() nounwind {
 entry:
 ; CHECK: t2:
 ; CHECK: cmp r0, #0
-; CHECK: beq
+; CHECK: bne
        br i1 undef, label %bb.i.i3, label %growMapping.exit
 
 bb.i.i3:               ; preds = %entry

diff --git a/test/CodeGen/Thumb2/thumb2-jtb.ll b/test/CodeGen/Thumb2/thumb2-jtb.ll
index f5a56e5ace084113280979535b24d978c989144c..7e1655f6c25246ebeb37a2ce4111474525bc9361 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-jtb.ll
+++ b/test/CodeGen/Thumb2/thumb2-jtb.ll
@@ -3,11 +3,19 @@
 ; Do not use tbb / tbh if any destination is before the jumptable.
 ; rdar://7102917
 
-define i16 @main__getopt_internal_2E_exit_2E_ce(i32) nounwind {
+define i16 @main__getopt_internal_2E_exit_2E_ce(i32, i1 %b) nounwind {
+entry:
+  br i1 %b, label %codeRepl127.exitStub, label %newFuncRoot
+
 newFuncRoot:
        br label %_getopt_internal.exit.ce
 
 codeRepl127.exitStub:          ; preds = %_getopt_internal.exit.ce
+  ; Add an explicit edge back to before the jump table to ensure this block
+  ; is placed first.
+  br i1 %b, label %newFuncRoot, label %codeRepl127.exitStub.exit
+
+codeRepl127.exitStub.exit:
        ret i16 0
 
 parse_options.exit.loopexit.exitStub:          ; preds = %_getopt_internal.exit.ce

diff --git a/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
index 88e8b4a4fd92408c268c826f8547b3ece8a6da34..d583e5964dc2b47a611fe49e0caeea301f309bf6 100644 (file)
--- a/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
+++ b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
@@ -6,8 +6,8 @@
 define i32 @test(i32 %argc, i8** %argv) nounwind {
 entry:
 ; CHECK: cmpl  $2
-; CHECK-NEXT: je
-; CHECK-NEXT: %entry
+; CHECK-NEXT: jne
+; CHECK-NEXT: %bb2
 
        switch i32 %argc, label %UnifiedReturnBlock [
                 i32 1, label %bb

diff --git a/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll b/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
index a708224dd0d99d7e758b549306c7b2d6279b531f..4160b203e36b304786a4206ca26ce4f3c6efadb8 100644 (file)
--- a/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
+++ b/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jnp
+; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jp
 ; rdar://5902801
 
 declare void @test2()

diff --git a/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll b/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
index 1919d2ef34aecf48264cbbfd7d7af66f92ea28ab..12a8274fb56f961715c29dfeb2477a3eae2c2cee 100644 (file)
--- a/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
+++ b/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
@@ -17,7 +17,7 @@ entry:
 
 ; CHECK: andl  $150
 ; CHECK-NEXT: testb
-; CHECK-NEXT: jg
+; CHECK-NEXT: jle
 
 entry.if.end_crit_edge:                           ; preds = %entry
   %tmp4.pre = load i32* @g_38                     ; <i32> [#uses=1]

diff --git a/test/CodeGen/X86/block-placement.ll b/test/CodeGen/X86/block-placement.ll
index 608e1eaba467e531764a77626b57a05b27be26d8..fc7b6383b8b049eb28a541dc28f0f0f023aaefc1 100644 (file)
--- a/test/CodeGen/X86/block-placement.ll
+++ b/test/CodeGen/X86/block-placement.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-linux -enable-block-placement < %s | FileCheck %s
+; RUN: llc -mtriple=i686-linux < %s | FileCheck %s
 
 declare void @error(i32 %i, i32 %a, i32 %b)
 

diff --git a/test/CodeGen/X86/br-fold.ll b/test/CodeGen/X86/br-fold.ll
index 8af3bd1bc229841675738b075a4e61313a5b1507..1dd59a7336d9602d444b7a61830ab20356e08a36 100644 (file)
--- a/test/CodeGen/X86/br-fold.ll
+++ b/test/CodeGen/X86/br-fold.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -march=x86-64 < %s | FileCheck %s
 
 ; CHECK: orq
-; CHECK-NEXT: jne
+; CHECK-NEXT: je
 
 @_ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE = external constant [33 x i16], align 32 ; <[33 x i16]*> [#uses=1]
 @_ZN11xercesc_2_56XMLUni16fgNotationStringE = external constant [9 x i16], align 16 ; <[9 x i16]*> [#uses=1]

diff --git a/test/CodeGen/X86/call-push.ll b/test/CodeGen/X86/call-push.ll
index 8cca10c830736a75e4cf938e4a86528f27c12bfb..e69f8c1ebf79417328017d8138b78c7a3cc9b7bb 100644 (file)
--- a/test/CodeGen/X86/call-push.ll
+++ b/test/CodeGen/X86/call-push.ll
@@ -7,8 +7,8 @@ define i32 @decode_byte(%struct.decode_t* %decode) nounwind {
 ; CHECK: decode_byte:
 ; CHECK: pushl
 ; CHECK: popl
-; CHECK: popl
 ; CHECK: jmp
+; CHECK: popl
 entry:
         %tmp2 = getelementptr %struct.decode_t* %decode, i32 0, i32 4           ; <i16*> [#uses=1]
         %tmp23 = bitcast i16* %tmp2 to i32*             ; <i32*> [#uses=1]

diff --git a/test/CodeGen/X86/licm-dominance.ll b/test/CodeGen/X86/licm-dominance.ll
index 8a0958db0ef5963539da26733133d1472b5937dc..019f8a32b6c064407b111ebf9ddf73570684e7ef 100644 (file)
--- a/test/CodeGen/X86/licm-dominance.ll
+++ b/test/CodeGen/X86/licm-dominance.ll
@@ -1,7 +1,7 @@
-; RUN: llc -asm-verbose=false < %s | FileCheck %s
+; RUN: llc -asm-verbose=true < %s | FileCheck %s
 
 ; MachineLICM should check dominance before hoisting instructions.
-; CHECK:       jne     LBB0_3
+; CHECK: ## in Loop:
 ; CHECK-NEXT:  xorb    %al, %al
 ; CHECK-NEXT:  testb   %al, %al
 

diff --git a/test/CodeGen/X86/loop-blocks.ll b/test/CodeGen/X86/loop-blocks.ll
index faba630071277e953700f4ab03cda99170c7ef43..d14102fe245bfaa57c0fdcfb9f5ba231e2c7af1c 100644 (file)
--- a/test/CodeGen/X86/loop-blocks.ll
+++ b/test/CodeGen/X86/loop-blocks.ll
@@ -41,6 +41,7 @@ done:
 ; CHECK-NEXT:   align
 ; CHECK-NEXT: .LBB1_4:
 ; CHECK-NEXT:   callq bar99
+; CHECK-NEXT:   align
 ; CHECK-NEXT: .LBB1_1:
 ; CHECK-NEXT:   callq body
 
@@ -75,19 +76,21 @@ exit:
 ; CHECK: yet_more_involved:
 ;      CHECK:   jmp .LBB2_1
 ; CHECK-NEXT:   align
-; CHECK-NEXT: .LBB2_4:
-; CHECK-NEXT:   callq bar99
+; CHECK-NEXT: .LBB2_5:
+; CHECK-NEXT:   callq block_a_true_func
+; CHECK-NEXT:   callq block_a_merge_func
+; CHECK-NEXT:   align
+; CHECK-NEXT: .LBB2_1:
+; CHECK-NEXT:   callq body
+;
+; LBB2_4
+;      CHECK:   callq bar99
 ; CHECK-NEXT:   callq get
 ; CHECK-NEXT:   cmpl $2999, %eax
 ; CHECK-NEXT:   jle .LBB2_5
 ; CHECK-NEXT:   callq block_a_false_func
 ; CHECK-NEXT:   callq block_a_merge_func
 ; CHECK-NEXT:   jmp .LBB2_1
-; CHECK-NEXT: .LBB2_5:
-; CHECK-NEXT:   callq block_a_true_func
-; CHECK-NEXT:   callq block_a_merge_func
-; CHECK-NEXT: .LBB2_1:
-; CHECK-NEXT:   callq body
 
 define void @yet_more_involved() nounwind {
 entry:
@@ -136,17 +139,22 @@ exit:
 ; CHECK-NEXT:   align
 ; CHECK-NEXT: .LBB3_7:
 ; CHECK-NEXT:   callq   bar100
-; CHECK-NEXT:   jmp     .LBB3_1
-; CHECK-NEXT: .LBB3_8:
+; CHECK-NEXT:   align
+; CHECK-NEXT: .LBB3_1:
+; CHECK-NEXT:   callq   loop_header
+;      CHECK:   jl .LBB3_7
+;      CHECK:   jge .LBB3_3
 ; CHECK-NEXT:   callq   bar101
 ; CHECK-NEXT:   jmp     .LBB3_1
-; CHECK-NEXT: .LBB3_9:
+; CHECK-NEXT: .LBB3_3:
+;      CHECK:   jge .LBB3_4
 ; CHECK-NEXT:   callq   bar102
 ; CHECK-NEXT:   jmp     .LBB3_1
-; CHECK-NEXT: .LBB3_5:
+; CHECK-NEXT: .LBB3_4:
+;      CHECK:   jl .LBB3_6
 ; CHECK-NEXT:   callq   loop_latch
-; CHECK-NEXT: .LBB3_1:
-; CHECK-NEXT:   callq   loop_header
+; CHECK-NEXT:   jmp     .LBB3_1
+; CHECK-NEXT: .LBB3_6:
 
 define void @cfg_islands() nounwind {
 entry:

diff --git a/test/CodeGen/X86/machine-cp.ll b/test/CodeGen/X86/machine-cp.ll
index 54fa01c38fdeb8f401be5687cbabc9c08d699279..8e97b991d076c347191f5bf26749eb1d70415c06 100644 (file)
--- a/test/CodeGen/X86/machine-cp.ll
+++ b/test/CodeGen/X86/machine-cp.ll
@@ -5,11 +5,11 @@
 define i32 @t1(i32 %a, i32 %b) nounwind  {
 entry:
 ; CHECK: t1:
-; CHECK: jne
+; CHECK: je [[LABEL:.*BB.*]]
   %cmp1 = icmp eq i32 %b, 0
   br i1 %cmp1, label %while.end, label %while.body
 
-; CHECK: BB
+; CHECK: [[LABEL]]:
 ; CHECK-NOT: mov
 ; CHECK: ret
 

diff --git a/test/CodeGen/X86/postra-licm.ll b/test/CodeGen/X86/postra-licm.ll
index 48c48aebe5beec0a40101b321d5e0fbc61b6e1f9..01d6cbef1ee5693c4ad02a77bb8b84954c5dc8a5 100644 (file)
--- a/test/CodeGen/X86/postra-licm.ll
+++ b/test/CodeGen/X86/postra-licm.ll
@@ -70,8 +70,8 @@ bb26.preheader:                                   ; preds = %imix_test.exit
 bb23:                                             ; preds = %imix_test.exit
   unreachable
 ; Verify that there are no loads inside the loop.
-; X86-32: %bb26.preheader
 ; X86-32: .align 4
+; X86-32: %bb28
 ; X86-32-NOT: (%esp),
 ; X86-32-NOT: (%ebp),
 ; X86-32: jmp

diff --git a/test/CodeGen/X86/pr2659.ll b/test/CodeGen/X86/pr2659.ll
index 5dab5c9f5b8ced0ce4aa6d2008b14ab355a2ed35..8003588a2e84c720c19a8bb4479216a5b6a5b652 100644 (file)
--- a/test/CodeGen/X86/pr2659.ll
+++ b/test/CodeGen/X86/pr2659.ll
@@ -18,11 +18,12 @@ forcond.preheader:              ; preds = %entry
 ; CHECK-NOT: xorl
 ; CHECK-NOT: movl
 ; CHECK-NOT: LBB
-; CHECK: jne
+; CHECK: je
 
 ; There should be no moves required in the for loop body.
 ; CHECK: %forbody
 ; CHECK-NOT: mov
+; CHECK: jbe
 
 ifthen:         ; preds = %entry
   ret i32 0

diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll
index ce04e07854a49651f84d8cef6f1a53fcc5951438..f465a4ffc58476b947b2e80c64671617ea2a1b5b 100644 (file)
--- a/test/CodeGen/X86/select.ll
+++ b/test/CodeGen/X86/select.ll
@@ -75,9 +75,9 @@ define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
 ; Verify that the fmul gets sunk into the one part of the diamond where it is
 ; needed.
 ; CHECK: test6:
-; CHECK: jne
-; CHECK: mulps
+; CHECK: je
 ; CHECK: ret
+; CHECK: mulps
 ; CHECK: ret
 }
 

diff --git a/test/CodeGen/X86/sibcall.ll b/test/CodeGen/X86/sibcall.ll
index a9a5420cbcd8386792aefb378fb755074f4ee02e..2af355905dc3f5f847f6db15b9a4c8046e4d99d3 100644 (file)
--- a/test/CodeGen/X86/sibcall.ll
+++ b/test/CodeGen/X86/sibcall.ll
@@ -147,7 +147,7 @@ define i32 @t11(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind ssp {
 
 ; 32: t11:
 ; 32-NOT: subl ${{[0-9]+}}, %esp
-; 32: jne
+; 32: je
 ; 32-NOT: movl
 ; 32-NOT: addl ${{[0-9]+}}, %esp
 ; 32: jmp {{_?}}foo5

diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll
index e13a81719ea7d2ac3052ee199ba43084151a6ea6..7957eb849673dd2b597db73af5cc14be935aec26 100644 (file)
--- a/test/CodeGen/X86/sink-hoist.ll
+++ b/test/CodeGen/X86/sink-hoist.ll
@@ -7,8 +7,9 @@
 
 ; CHECK: foo:
 ; CHECK-NEXT: testb $1, %dil
-; CHECK-NEXT: je
+; CHECK-NEXT: jne
 ; CHECK-NEXT: divsd
+; CHECK-NEXT: movaps
 ; CHECK-NEXT: ret
 ; CHECK:      divsd
 
@@ -25,10 +26,10 @@ define double @foo(double %x, double %y, i1 %c) nounwind {
 
 ; CHECK: split:
 ; CHECK-NEXT: testb $1, %dil
-; CHECK-NEXT: je
-; CHECK-NEXT: divsd
+; CHECK-NEXT: jne
+; CHECK-NEXT: movaps
 ; CHECK-NEXT: ret
-; CHECK:      movaps
+; CHECK:      divsd
 ; CHECK-NEXT: ret
 define double @split(double %x, double %y, i1 %c) nounwind {
   %a = fdiv double %x, 3.2

diff --git a/test/CodeGen/X86/smul-with-overflow.ll b/test/CodeGen/X86/smul-with-overflow.ll
index 7c2e247c8740f3daeb75f66a2f385c275b9288fa..7ac3840482a23912f1886eaa9673014aa7a1670f 100644 (file)
--- a/test/CodeGen/X86/smul-with-overflow.ll
+++ b/test/CodeGen/X86/smul-with-overflow.ll
@@ -19,7 +19,7 @@ overflow:
   ret i1 false
 ; CHECK: test1:
 ; CHECK: imull
-; CHECK-NEXT: jo
+; CHECK-NEXT: jno
 }
 
 define i1 @test2(i32 %v1, i32 %v2) nounwind {

diff --git a/test/CodeGen/X86/sub-with-overflow.ll b/test/CodeGen/X86/sub-with-overflow.ll
index 749b5db480f5c74557b846ab0742828dd2624f01..db8313cecdce78c511ed9c409f375da227d3a61a 100644 (file)
--- a/test/CodeGen/X86/sub-with-overflow.ll
+++ b/test/CodeGen/X86/sub-with-overflow.ll
@@ -20,7 +20,7 @@ overflow:
 
 ; CHECK: func1:
 ; CHECK: subl 20(%esp)
-; CHECK-NEXT: jo
+; CHECK-NEXT: jno
 }
 
 define i1 @func2(i32 %v1, i32 %v2) nounwind {
@@ -40,7 +40,7 @@ carry:
 
 ; CHECK: func2:
 ; CHECK: subl 20(%esp)
-; CHECK-NEXT: jb
+; CHECK-NEXT: jae
 }
 
 declare i32 @printf(i8*, ...) nounwind

diff --git a/test/CodeGen/X86/switch-bt.ll b/test/CodeGen/X86/switch-bt.ll
index 8e39342214357a1f0db34d34ea8c044b1af42105..58a5c0338547458310ce62bc443c7cee52c5ff9e 100644 (file)
--- a/test/CodeGen/X86/switch-bt.ll
+++ b/test/CodeGen/X86/switch-bt.ll
@@ -5,11 +5,11 @@
 
 ;      CHECK: movabsq $2305843009482129440, %r
 ; CHECK-NEXT: btq %rax, %r
-; CHECK-NEXT: jb
-; CHECK-NEXT: movl  $671088640, %e
+; CHECK-NEXT: jae
+;     CHECK: movl  $671088640, %e
 ; CHECK-NEXT: btq %rax, %r
-; CHECK-NEXT: jb
-; CHECK-NEXT: testq %rax, %r
+; CHECK-NEXT: jae
+;      CHECK: testq %rax, %r
 ; CHECK-NEXT: j
 
 define void @test(i8* %l) nounwind {
@@ -60,7 +60,7 @@ define void @test2(i32 %x) nounwind ssp {
 ; CHECK-NEXT: movl $91
 ; CHECK-NOT: movl
 ; CHECK-NEXT: btl
-; CHECK-NEXT: jb
+; CHECK-NEXT: jae
 entry:
   switch i32 %x, label %if.end [
     i32 6, label %if.then
@@ -85,7 +85,7 @@ define void @test3(i32 %x) nounwind {
 ; CHECK: cmpl $5
 ; CHECK: ja
 ; CHECK: cmpl $4
-; CHECK: jne
+; CHECK: je
   switch i32 %x, label %if.end [
     i32 0, label %if.then
     i32 1, label %if.then

diff --git a/test/CodeGen/X86/tail-opts.ll b/test/CodeGen/X86/tail-opts.ll
index f1b9f20082f54e1c871105fc59f90bd3944c077b..6e20af5866e4d6640069d2e5a02c872a13081877 100644 (file)
--- a/test/CodeGen/X86/tail-opts.ll
+++ b/test/CodeGen/X86/tail-opts.ll
@@ -113,15 +113,16 @@ altret:
 ; CHECK-NEXT:   jbe .LBB2_3
 ; CHECK-NEXT:   ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}}
 ; CHECK-NEXT:   ja .LBB2_4
-; CHECK-NEXT: .LBB2_2:
-; CHECK-NEXT:   movb $1, %al
-; CHECK-NEXT:   ret
+; CHECK-NEXT:   jmp .LBB2_2
 ; CHECK-NEXT: .LBB2_3:
 ; CHECK-NEXT:   ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}}
 ; CHECK-NEXT:   jbe .LBB2_2
 ; CHECK-NEXT: .LBB2_4:
 ; CHECK-NEXT:   xorb %al, %al
 ; CHECK-NEXT:   ret
+; CHECK-NEXT: .LBB2_2:
+; CHECK-NEXT:   movb $1, %al
+; CHECK-NEXT:   ret
 
 define i1 @dont_merge_oddly(float* %result) nounwind {
 entry:
@@ -336,10 +337,10 @@ return:
 
 ; CHECK: two:
 ; CHECK-NOT: XYZ
+; CHECK: ret
 ; CHECK: movl $0, XYZ(%rip)
 ; CHECK: movl $1, XYZ(%rip)
 ; CHECK-NOT: XYZ
-; CHECK: ret
 
 define void @two() nounwind optsize {
 entry:

diff --git a/test/CodeGen/X86/uint64-to-float.ll b/test/CodeGen/X86/uint64-to-float.ll
index e853e7717f12028e3c06606a17efb95c1b8f98f8..ca764e7568f34d7043c34c166c55af10f6a7f4d3 100644 (file)
--- a/test/CodeGen/X86/uint64-to-float.ll
+++ b/test/CodeGen/X86/uint64-to-float.ll
@@ -7,13 +7,14 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
 target triple = "x86_64-apple-darwin10.0.0"
 
 ; CHECK: testq %rdi, %rdi
-; CHECK-NEXT: jns LBB0_2
+; CHECK-NEXT: js LBB0_1
+; CHECK: cvtsi2ss
+; CHECK-NEXT: ret
+; CHECK: LBB0_1
 ; CHECK: shrq
 ; CHECK-NEXT: andq
 ; CHECK-NEXT: orq
 ; CHECK-NEXT: cvtsi2ss
-; CHECK: LBB0_2
-; CHECK-NEXT: cvtsi2ss
 define float @test(i64 %a) {
 entry:
   %b = uitofp i64 %a to float

diff --git a/test/CodeGen/X86/xor-icmp.ll b/test/CodeGen/X86/xor-icmp.ll
index 34875ed89957d688022e6a0c212c98bc3aa3db5c..fd1b0064046a117417c9a0aba5a974fe6527f04a 100644 (file)
--- a/test/CodeGen/X86/xor-icmp.ll
+++ b/test/CodeGen/X86/xor-icmp.ll
@@ -9,13 +9,13 @@ entry:
 ; X32-NOT: andb
 ; X32-NOT: shrb
 ; X32:     testb $64
-; X32:     jne
+; X32:     je
 
 ; X64:     t:
 ; X64-NOT: setne
 ; X64:     xorl
 ; X64:     testb $64
-; X64:     jne
+; X64:     je
   %0 = and i32 %a, 16384
   %1 = icmp ne i32 %0, 0
   %2 = and i32 %b, 16384
@@ -43,7 +43,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp {
 ; X32: cmpl
 ; X32: sete
 ; X32-NOT: xor
-; X32: jne
+; X32: je
 
 ; X64: t2:
 ; X64: testl
@@ -51,7 +51,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp {
 ; X64: testl
 ; X64: sete
 ; X64-NOT: xor
-; X64: jne
+; X64: je
 entry:
   %0 = icmp eq i32 %x, 0                          ; <i1> [#uses=1]
   %1 = icmp eq i32 %y, 0                          ; <i1> [#uses=1]

diff --git a/test/CodeGen/XCore/ashr.ll b/test/CodeGen/XCore/ashr.ll
index 4514fdb8bf3b52152604f0543293bd8a8437956f..03b6b1f1695039ebe3f2b5647219a48e1508c057 100644 (file)
--- a/test/CodeGen/XCore/ashr.ll
+++ b/test/CodeGen/XCore/ashr.ll
@@ -30,7 +30,7 @@ not_less:
 }
 ; CHECK: f1:
 ; CHECK-NEXT: ashr r0, r0, 32
-; CHECK-NEXT: bf r0
+; CHECK-NEXT: bt r0
 
 define i32 @f2(i32 %a) {
         %1 = icmp sge i32 %a, 0
@@ -51,9 +51,9 @@ define i32 @f3(i32 %a) {
 }
 ; CHECK: f3:
 ; CHECK-NEXT: ashr r0, r0, 32
-; CHECK-NEXT: bf r0
-; CHECK-NEXT: ldc r0, 10
-; CHECK: ldc r0, 17
+; CHECK-NEXT: bt r0
+; CHECK-NEXT: ldc r0, 17
+; CHECK: ldc r0, 10
 
 define i32 @f4(i32 %a) {
         %1 = icmp sge i32 %a, 0
@@ -62,9 +62,9 @@ define i32 @f4(i32 %a) {
 }
 ; CHECK: f4:
 ; CHECK-NEXT: ashr r0, r0, 32
-; CHECK-NEXT: bf r0
-; CHECK-NEXT: ldc r0, 17
-; CHECK: ldc r0, 10
+; CHECK-NEXT: bt r0
+; CHECK-NEXT: ldc r0, 10
+; CHECK: ldc r0, 17
 
 define i32 @f5(i32 %a) {
         %1 = icmp sge i32 %a, 0

diff --git a/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll b/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
index 2dcaab82a1a5e79aeed66fd9cc91976f92aef5e3..ed32ca8659c828326a7f533427c81e9c566409bc 100644 (file)
--- a/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
+++ b/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
@@ -61,7 +61,7 @@ exit:                                 ; preds = %cond.true29.i, %cond.true.i
 ; CHECK: @test2
 ; CHECK: %entry
 ; CHECK-NOT: mov
-; CHECK: jne
+; CHECK: je
 define void @test2(i32 %n) nounwind uwtable {
 entry:
   br i1 undef, label %while.end, label %for.cond468