fixed to test feature, not CPU
authorSanjay Patel <spatel@rotateright.com>
Fri, 6 Mar 2015 20:51:25 +0000 (20:51 +0000)
committerSanjay Patel <spatel@rotateright.com>
Fri, 6 Mar 2015 20:51:25 +0000 (20:51 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231513 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/X86/fnabs.ll

index 19718d3ff926fb2a255bc6506044566ba3bcfb7f..a3ddfb970dc446a18e66e44c3bd600f597ac9883 100644 (file)
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx| FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx| FileCheck %s
 
 ; Verify that we generate a single OR instruction for a scalar, vec128, and vec256
 ; FNABS(x) operation -> FNEG (FABS(x)).