Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern.
authorJim Grosbach <grosbach@apple.com>
Wed, 26 Oct 2011 17:28:15 +0000 (17:28 +0000)
committerJim Grosbach <grosbach@apple.com>
Wed, 26 Oct 2011 17:28:15 +0000 (17:28 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143034 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMInstrThumb2.td
test/CodeGen/ARM/select-imm.ll

index a65a75f8e3eb8873c979f3ebea33a64a0233169f..3facc64b49410b3a29ba1bc9cc85479285fb7959 100644 (file)
@@ -2887,7 +2887,7 @@ def t2MOVCCi32imm : PseudoInst<(outs rGPR:$dst),
 
 let isMoveImm = 1 in
 def t2MVNCCi : T2OneRegImm<(outs rGPR:$Rd), (ins rGPR:$false, t2_so_imm:$imm),
-                   IIC_iCMOVi, "mvn", ".w\t$Rd, $imm",
+                   IIC_iCMOVi, "mvn", "\t$Rd, $imm",
 [/*(set rGPR:$Rd,(ARMcmov rGPR:$false,t2_so_imm_not:$imm,
                    imm:$cc, CCR:$ccr))*/]>,
                    RegConstraint<"$false = $Rd"> {
index f43dde52bbfdae2ebcdc0c88cccd0000d102464a..e927b39be59754bc4baf7b40de3968046f9de655 100644 (file)
@@ -71,7 +71,7 @@ entry:
 ; ARMT2: movtlt [[R0]], #65365
 
 ; THUMB2: t4:
-; THUMB2: mvnlt.w [[R0:r[0-9]+]], #11141290
+; THUMB2: mvnlt [[R0:r[0-9]+]], #11141290
   %0 = icmp slt i32 %a, %b
   %1 = select i1 %0, i32 4283826005, i32 %x
   ret i32 %1