[X86] Add proper 64-bit mode checks to jrcxz and jcxz.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241381 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrControl.td b/lib/Target/X86/X86InstrControl.td
index 6ab961f04ecf4122d3ab9ffd75e25105dec880c6..4cd5563ce727b00d396c5465e2a255a7db4cd744 100644 (file)
--- a/lib/Target/X86/X86InstrControl.td
+++ b/lib/Target/X86/X86InstrControl.td
@@ -105,14 +105,16 @@ let isBranch = 1, isTerminator = 1, hasSideEffects = 0, SchedRW = [WriteJump] in
   // jecxz.
   let Uses = [CX] in
     def JCXZ : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst),
-                        "jcxz\t$dst", [], IIC_JCXZ>, AdSize16;
+                        "jcxz\t$dst", [], IIC_JCXZ>, AdSize16,
+                        Requires<[Not64BitMode]>;
   let Uses = [ECX] in
     def JECXZ : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst),
                         "jecxz\t$dst", [], IIC_JCXZ>, AdSize32;
 
   let Uses = [RCX] in
     def JRCXZ : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst),
-                           "jrcxz\t$dst", [], IIC_JCXZ>, AdSize64;
+                         "jrcxz\t$dst", [], IIC_JCXZ>, AdSize64,
+                         Requires<[In64BitMode]>;
 }
 
 // Indirect branches

diff --git a/test/MC/X86/x86_errors.s b/test/MC/X86/x86_errors.s
index fa87ef676f3e54091dcd1fbac789c4c9d7812298..4a5bd977d9ff902fd8452f8fa67bb7c98e5845d2 100644 (file)
--- a/test/MC/X86/x86_errors.s
+++ b/test/MC/X86/x86_errors.s
@@ -58,3 +58,9 @@ cmpps $-129, %xmm0, %xmm0
 // 32: error: invalid operand for instruction
 // 64: error: invalid operand for instruction
 cmppd $256, %xmm0, %xmm0
+
+// 32: error: instruction requires: 64-bit mode
+jrcxz 1
+
+// 64: error: instruction requires: Not 64-bit mode
+jcxz 1