Mips32 does not reserve even-numbered floating point registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139412 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp
index 94e84d764de4200da93b0e97bbab2982f6c8d570..c12b3560ee6319bdcfd536f9b946699f74db549d 100644 (file)
--- a/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -132,11 +132,6 @@ getReservedRegs(const MachineFunction &MF) const {
   Reserved.set(Mips::F31);
   Reserved.set(Mips::D15);
 
-  // SRV4 requires that odd register can't be used.
-  if (!Subtarget.isSingleFloat() && !Subtarget.isMips32())
-    for (unsigned FReg=(Mips::F0)+1; FReg < Mips::F30; FReg+=2)
-      Reserved.set(FReg);
-
   return Reserved;
 }