implement several trivial operand printers, reducing

failures in CodeGen/PowerPC from 120 -> 117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119063 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
index 767dc52b56c3539f326fb16abb0d2945bc96f255..fcb5f2fefdd30369c417da27ceaeef05ad307cff 100644 (file)
--- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
+++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
@@ -39,6 +39,56 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
   printInstruction(MI, O);
 }
 
+void PPCInstPrinter::printS5ImmOperand(const MCInst *MI, unsigned OpNo,
+                                       raw_ostream &O) {
+  char Value = MI->getOperand(OpNo).getImm();
+  Value = (Value << (32-5)) >> (32-5);
+  O << (int)Value;
+}
+
+void PPCInstPrinter::printU5ImmOperand(const MCInst *MI, unsigned OpNo,
+                                       raw_ostream &O) {
+  unsigned char Value = MI->getOperand(OpNo).getImm();
+  assert(Value <= 31 && "Invalid u5imm argument!");
+  O << (unsigned int)Value;
+}
+
+void PPCInstPrinter::printU6ImmOperand(const MCInst *MI, unsigned OpNo,
+                                       raw_ostream &O) {
+  unsigned char Value = MI->getOperand(OpNo).getImm();
+  assert(Value <= 63 && "Invalid u6imm argument!");
+  O << (unsigned int)Value;
+}
+
+void PPCInstPrinter::printS16ImmOperand(const MCInst *MI, unsigned OpNo,
+                                        raw_ostream &O) {
+  O << (short)MI->getOperand(OpNo).getImm();
+}
+
+void PPCInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo,
+                                        raw_ostream &O) {
+  O << (unsigned short)MI->getOperand(OpNo).getImm();
+}
+
+void PPCInstPrinter::printS16X4ImmOperand(const MCInst *MI, unsigned OpNo,
+                                          raw_ostream &O) {
+  if (MI->getOperand(OpNo).isImm()) {
+    O << (short)(MI->getOperand(OpNo).getImm()*4);
+    return;
+  }
+  
+  assert(0 && "Unhandled operand");
+#if 0
+  O << "lo16(";
+  printOp(MI->getOperand(OpNo), O);
+  if (TM.getRelocationModel() == Reloc::PIC_)
+    O << "-\"L" << getFunctionNumber() << "$pb\")";
+  else
+    O << ')';
+#endif
+}
+
+
 /// stripRegisterPrefix - This method strips the character prefix from a
 /// register name so that only the number is left.  Used by for linux asm.
 const char *stripRegisterPrefix(const char *RegName) {

diff --git a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
index 8176a1bdb33438b2e394c48e2d0c874fd910ad40..ef6a9a529a1a0bb7ecb2ccc13d139a10f27de6e4 100644 (file)
--- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
+++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
@@ -45,12 +45,12 @@ public:
                              raw_ostream &O, const char *Modifier) {}
 
 
-  void printS5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}
-  void printU5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}
-  void printU6ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}
-  void printS16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}
-  void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}
-  void printS16X4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}
+  void printS5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+  void printU5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+  void printU6ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+  void printS16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+  void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+  void printS16X4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
   void printBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}
   void printCallOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}
   void printAbsAddrOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {}