Bitcode: Correctly compare a Use against itself

Fix the sort of expected order in the reader to correctly return `false`
when comparing a `Use` against itself.

This was caught by test/Bitcode/binaryIntInstructions.3.2.ll, so I'm
adding a `RUN` line using `llvm-uselistorder` for every test in
`test/Bitcode` that passes.

A few tests still fail, so I'll investigate those next.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214157 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Bitcode/Writer/ValueEnumerator.cpp b/lib/Bitcode/Writer/ValueEnumerator.cpp
index 273ea06c641df30bca62890faf39650af2472ab6..f0f9f7430c531e2c6f6e93c0194c324dcc7450da 100644 (file)
--- a/lib/Bitcode/Writer/ValueEnumerator.cpp
+++ b/lib/Bitcode/Writer/ValueEnumerator.cpp
@@ -106,6 +106,9 @@ static void predictValueUseListOrderImpl(const Value *V, const Function *F,
             [&OM, ID](const Entry &L, const Entry &R) {
     const Use *LU = L.first;
     const Use *RU = R.first;
+    if (LU == RU)
+      return false;
+
     auto LID = OM.lookup(LU->getUser()).first;
     auto RID = OM.lookup(RU->getUser()).first;
     // If ID is 4, then expect: 7 6 5 1 2 3.

diff --git a/test/Bitcode/2006-12-11-Cast-ConstExpr.ll b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
index e704627e3610ba142d826de4bcb909157ea291cc..e1e2d7dc5447b905de5560f3c64bd26b8ae00773 100644 (file)
--- a/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
+++ b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
@@ -1,6 +1,7 @@
 ; This test ensures that we get a bitcast constant expression in and out,
 ; not a sitofp constant expression. 
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; CHECK: bitcast (
 
 @G = external global i32

diff --git a/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
index 415f88e1637483b9749ebd5c2b9d192cff2c172d..a321ce213113c4e5cdad20b191bbdfbc9c4192e4 100644 (file)
--- a/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
+++ b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; PR4373
 
 @foo = weak global { i32 } zeroinitializer              

diff --git a/test/Bitcode/aggregateInstructions.3.2.ll b/test/Bitcode/aggregateInstructions.3.2.ll
index 8d9378c363f45dc11e91ca95442644872e54d054..4d35be08bd12e62cb646a52bfd1faeb007190559 100644 (file)
--- a/test/Bitcode/aggregateInstructions.3.2.ll
+++ b/test/Bitcode/aggregateInstructions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread instructions with aggregate operands

diff --git a/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
index 10b9284e9814ea3d01caed32dba2c297c4a88331..fba518fe7f7f002a17f816c2592abb285de05dcd 100644 (file)
--- a/test/Bitcode/arm32_neon_vcnt_upgrade.ll
+++ b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; Tests vclz and vcnt
 
 define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {

diff --git a/test/Bitcode/atomic.ll b/test/Bitcode/atomic.ll
index d41c9e7acf72b250d9d7592c0ec7c0bc8287fed7..448219a59cb4c3928a68601d2aaa8c7966afcbbe 100644 (file)
--- a/test/Bitcode/atomic.ll
+++ b/test/Bitcode/atomic.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
   cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst

diff --git a/test/Bitcode/attributes-3.3.ll b/test/Bitcode/attributes-3.3.ll
index cd70ba1a749aa8365514b7d2fd4f7a8e315f5dd5..7b44938a3e828bba995761b061fed7e9f02cbe9a 100644 (file)
--- a/test/Bitcode/attributes-3.3.ll
+++ b/test/Bitcode/attributes-3.3.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3.
 ; The test checks that LLVM does not silently misread attributes of

diff --git a/test/Bitcode/attributes.ll b/test/Bitcode/attributes.ll
index 9a429f6e21f729bc3384b7bfab4ae0d247033777..0fe66f5ad82cf95b53ed42a5351b9c83b77f651f 100644 (file)
--- a/test/Bitcode/attributes.ll
+++ b/test/Bitcode/attributes.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; PR12696
 
 define void @f1(i8 zeroext)

diff --git a/test/Bitcode/binaryFloatInstructions.3.2.ll b/test/Bitcode/binaryFloatInstructions.3.2.ll
index ef0b03dbe544885db4bacde341969367f301bbef..a0010e03834df605e222be2c3425cbf9bcd23760 100644 (file)
--- a/test/Bitcode/binaryFloatInstructions.3.2.ll
+++ b/test/Bitcode/binaryFloatInstructions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread binary float instructions from

diff --git a/test/Bitcode/binaryIntInstructions.3.2.ll b/test/Bitcode/binaryIntInstructions.3.2.ll
index 2856c13f8907b996310af9c8dbe9bf3c1a965b6f..bcf3d5882e05dfe1d256d34d62ea5a278541ae78 100644 (file)
--- a/test/Bitcode/binaryIntInstructions.3.2.ll
+++ b/test/Bitcode/binaryIntInstructions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread binary integer instructions from

diff --git a/test/Bitcode/bitwiseInstructions.3.2.ll b/test/Bitcode/bitwiseInstructions.3.2.ll
index a8ca963f62aa8b232c8c7e33aba0b7b16a536d29..780f0447a52c6cbc6b95514b041eb9fee279df21 100644 (file)
--- a/test/Bitcode/bitwiseInstructions.3.2.ll
+++ b/test/Bitcode/bitwiseInstructions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread bitwise instructions from

diff --git a/test/Bitcode/calling-conventions.3.2.ll b/test/Bitcode/calling-conventions.3.2.ll
index aca9efd0892bf4b3afd4a964f31f14f4d3c5f4c9..6a497dc8d5a862a957736d20b4c60f7f05cbd532 100644 (file)
--- a/test/Bitcode/calling-conventions.3.2.ll
+++ b/test/Bitcode/calling-conventions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not silently misread calling conventions of

diff --git a/test/Bitcode/case-ranges-3.3.ll b/test/Bitcode/case-ranges-3.3.ll
index 6e1d0a69a5910e8cf0e902bfdad5baa331c4bb9b..1198f2bb2cb8bed65687b58d042171b451628dff 100644 (file)
--- a/test/Bitcode/case-ranges-3.3.ll
+++ b/test/Bitcode/case-ranges-3.3.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3
 ; release of LLVM. This tests that the bitcode for switches from that release

diff --git a/test/Bitcode/cmpxchg-upgrade.ll b/test/Bitcode/cmpxchg-upgrade.ll
index eae62b074546232e9b5c629d72402dbee50abdce..94f0eef455e6e5f7cef283f06050f43557c61a50 100644 (file)
--- a/test/Bitcode/cmpxchg-upgrade.ll
+++ b/test/Bitcode/cmpxchg-upgrade.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
 ; before the IR change on this file.

diff --git a/test/Bitcode/conversionInstructions.3.2.ll b/test/Bitcode/conversionInstructions.3.2.ll
index 245388500a06518b86e7bb504e3b8bae43de631d..9f8204821d4d64adf26857e4f9c82d38533b5d90 100644 (file)
--- a/test/Bitcode/conversionInstructions.3.2.ll
+++ b/test/Bitcode/conversionInstructions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread conversion instructions from

diff --git a/test/Bitcode/drop-debug-info.ll b/test/Bitcode/drop-debug-info.ll
index 5123018577ee32a64f030baf99bbfc0893bcb3b8..b3073e0d6c8b709d2b292aaac2d48783979e74da 100644 (file)
--- a/test/Bitcode/drop-debug-info.ll
+++ b/test/Bitcode/drop-debug-info.ll
@@ -1,5 +1,6 @@
 ; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s
 ; RUN: llvm-dis < %t.bc | FileCheck %s
+; RUN: llvm-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
 
 define i32 @main() {
 entry:

diff --git a/test/Bitcode/extractelement.ll b/test/Bitcode/extractelement.ll
index 8999c656fce99ecc333e09dee41781f88520cf61..29f5b029200cad4165e5b7e4eae38b74ca19ff53 100644 (file)
--- a/test/Bitcode/extractelement.ll
+++ b/test/Bitcode/extractelement.ll
@@ -1,4 +1,5 @@
 ; RUN: opt < %s -constprop | llvm-dis -disable-output
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; PR3465
 
 define double @test() {

diff --git a/test/Bitcode/flags.ll b/test/Bitcode/flags.ll
index 7b0c5b538894626c0f74ca7b5af579e60aac777c..3760a44bd6fd446c6b436c58196b9af65a450956 100644 (file)
--- a/test/Bitcode/flags.ll
+++ b/test/Bitcode/flags.ll
@@ -1,6 +1,7 @@
 ; RUN: llvm-as < %s | llvm-dis > %t0
 ; RUN: opt -S < %s > %t1
 ; RUN: diff %t0 %t1
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; PR6140
 
 ; Make sure the flags are serialized/deserialized properly for both

diff --git a/test/Bitcode/function-encoding-rel-operands.ll b/test/Bitcode/function-encoding-rel-operands.ll
index aedb0c32676f8efe8e508b37177aec3838f287ca..cc2f6aef5e5b7c5e8431fae1aa851d9ee0a268d1 100644 (file)
--- a/test/Bitcode/function-encoding-rel-operands.ll
+++ b/test/Bitcode/function-encoding-rel-operands.ll
@@ -1,6 +1,7 @@
 ; Basic sanity test to check that instruction operands are encoded with
 ; relative IDs.
 ; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; CHECK: FUNCTION_BLOCK
 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1

diff --git a/test/Bitcode/global-variables.3.2.ll b/test/Bitcode/global-variables.3.2.ll
index 549d025549bee67c9d7c7ec48fec87047c274e69..4a856f199e58b99be6405d0341e1b2fc724b739d 100644 (file)
--- a/test/Bitcode/global-variables.3.2.ll
+++ b/test/Bitcode/global-variables.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not silently misread global variables attributes of

diff --git a/test/Bitcode/inalloca.ll b/test/Bitcode/inalloca.ll
index bad87a9b03f0188761f3668eede3458593b4d48b..445b4a282bff09992dd1075f09a278b018cbaa41 100644 (file)
--- a/test/Bitcode/inalloca.ll
+++ b/test/Bitcode/inalloca.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; inalloca should roundtrip.
 

diff --git a/test/Bitcode/linkage-types-3.2.ll b/test/Bitcode/linkage-types-3.2.ll
index fd070efbd44482b5ec820899729eac390841297b..01b195f6c51a7c483d3d677bdb3ee1895d4af2f9 100644 (file)
--- a/test/Bitcode/linkage-types-3.2.ll
+++ b/test/Bitcode/linkage-types-3.2.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2
 ; The test checks that LLVM does not silently misread linkage types of

diff --git a/test/Bitcode/memInstructions.3.2.ll b/test/Bitcode/memInstructions.3.2.ll
index a84f8c3d84e35efa69937a76d19aacbc813dacba..a8073225a69c7a9392e5de538bf6bb089da58eb8 100644 (file)
--- a/test/Bitcode/memInstructions.3.2.ll
+++ b/test/Bitcode/memInstructions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread memory related instructions of

diff --git a/test/Bitcode/metadata.ll b/test/Bitcode/metadata.ll
index fc8a622252bfbcecd89342271ce037f1f270e435..a3550bcaceca9671f415777735ac9a1c70dcad0c 100644 (file)
--- a/test/Bitcode/metadata.ll
+++ b/test/Bitcode/metadata.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 !llvm.foo = !{!0}
 !0 = metadata !{i32 42}

diff --git a/test/Bitcode/ptest-new.ll b/test/Bitcode/ptest-new.ll
index 735cc9c1cc44e1f84bff2c1b80ad401007ab827f..c0ded8b622c09e589758ebf1b922740e73cd34c9 100644 (file)
--- a/test/Bitcode/ptest-new.ll
+++ b/test/Bitcode/ptest-new.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 define i32 @foo(<2 x i64> %bar) nounwind {
 entry:

diff --git a/test/Bitcode/ptest-old.ll b/test/Bitcode/ptest-old.ll
index fbe962fae51a7cbe4f50d36c27ba4fd84ae6f934..c6c160539c2174c590e220425adf43db5c9f21e4 100644 (file)
--- a/test/Bitcode/ptest-old.ll
+++ b/test/Bitcode/ptest-old.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 define i32 @foo(<4 x float> %bar) nounwind {
 entry:

diff --git a/test/Bitcode/select.ll b/test/Bitcode/select.ll
index 08a3061394dbb516a84464e478b80da5ab9b375a..3da538578706a837ef56614d83999116c9f9dfa3 100644 (file)
--- a/test/Bitcode/select.ll
+++ b/test/Bitcode/select.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 define <2 x i32> @main() {
   ret <2 x i32> select (<2 x i1> <i1 false, i1 undef>, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 undef>)

diff --git a/test/Bitcode/shuffle.ll b/test/Bitcode/shuffle.ll
index 1495d8eebf9c64ef8027eae84d37381570cae1e5..65bde6765c26cf3004b76ca33386a525dd1edb3b 100644 (file)
--- a/test/Bitcode/shuffle.ll
+++ b/test/Bitcode/shuffle.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; <rdar://problem/8622574>
 ; tests the bitcodereader can handle the case where the reader will initially

diff --git a/test/Bitcode/tailcall.ll b/test/Bitcode/tailcall.ll
index 765b47054cad8a51d01790962635ed909f9fb60e..ea47df62011a81f2ae240c356060f447efa323bd 100644 (file)
--- a/test/Bitcode/tailcall.ll
+++ b/test/Bitcode/tailcall.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; Check that musttail and tail roundtrip.
 

diff --git a/test/Bitcode/terminatorInstructions.3.2.ll b/test/Bitcode/terminatorInstructions.3.2.ll
index 9c70833ae6158ada21a5d9810ded5ec26a65962d..d9e51a5996e895064eb0f4d3e34c358456df183e 100644 (file)
--- a/test/Bitcode/terminatorInstructions.3.2.ll
+++ b/test/Bitcode/terminatorInstructions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread terminator instructions from

diff --git a/test/Bitcode/upgrade-global-ctors.ll b/test/Bitcode/upgrade-global-ctors.ll
index bd253a81620f170e11b40bda651f0cab7b61b081..f75b28b7db1ef29d5e12b8d6365f32ed634b0442 100644 (file)
--- a/test/Bitcode/upgrade-global-ctors.ll
+++ b/test/Bitcode/upgrade-global-ctors.ll
@@ -1,3 +1,4 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer

diff --git a/test/Bitcode/upgrade-loop-metadata.ll b/test/Bitcode/upgrade-loop-metadata.ll
index 67a8d3935926ca1c79add418c88aeb26b4278c84..5c18bd930cc21a73a18b502f2f0ec9825509063c 100644 (file)
--- a/test/Bitcode/upgrade-loop-metadata.ll
+++ b/test/Bitcode/upgrade-loop-metadata.ll
@@ -1,6 +1,7 @@
 ; Test to make sure loop vectorizer metadata is automatically upgraded.
 ;
 ; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 define void @_Z28loop_with_vectorize_metadatav() {
 entry:

diff --git a/test/Bitcode/upgrade-tbaa.ll b/test/Bitcode/upgrade-tbaa.ll
index e7389095b8c1eac0832ed4ad5f1f53a565f4b6a7..0d88fa6ce3a730fc7ee357fa2c8ae0f84e231085 100644 (file)
--- a/test/Bitcode/upgrade-tbaa.ll
+++ b/test/Bitcode/upgrade-tbaa.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; Function Attrs: nounwind
 define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 {

diff --git a/test/Bitcode/vectorInstructions.3.2.ll b/test/Bitcode/vectorInstructions.3.2.ll
index 6d534c2f1438fde9c17fcac25a2e956db554da68..5b983ac0f02ed2d41b587ebdb86513c676dda700 100644 (file)
--- a/test/Bitcode/vectorInstructions.3.2.ll
+++ b/test/Bitcode/vectorInstructions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread vector operations of

diff --git a/test/Bitcode/visibility-styles.3.2.ll b/test/Bitcode/visibility-styles.3.2.ll
index ec2ee68320633322978feb4b6c731ee45c512030..cccc9509e67a8fd233bfbe3b030a3a78910d86c6 100644 (file)
--- a/test/Bitcode/visibility-styles.3.2.ll
+++ b/test/Bitcode/visibility-styles.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not silently misread visibility styles of

diff --git a/test/Bitcode/weak-cmpxchg-upgrade.ll b/test/Bitcode/weak-cmpxchg-upgrade.ll
index dbcd150633ed79fd67fb49b32d3b187ed536392f..fd543c4a96856979d0ad507cc0d614d5656c943e 100644 (file)
--- a/test/Bitcode/weak-cmpxchg-upgrade.ll
+++ b/test/Bitcode/weak-cmpxchg-upgrade.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
 ; before the IR change on this file.