Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59696 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index b621c41e12a4110a9523191324670e996a70945d..56fc55315f706ae74c1ff92b018e6ddd50a4bf4b 100644 (file)
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -686,9 +686,7 @@ unsigned ARMCodeEmitter::getMachineSoImmOpValue(unsigned SoImm) {
 
 unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI,
                                          const TargetInstrDesc &TID) const {
-  unsigned e = TID.getNumOperands();
-  if (e) --e; // Looks at the last non-implicit operand as well.
-  for (unsigned i = MI.getNumOperands(); i != e; --i) {
+  for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); i != e; --i){
     const MachineOperand &MO = MI.getOperand(i-1);
     if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR)
       return 1 << ARMII::S_BitShift;