[x86] Fix JCXZ,JECXZ_32 for 16-bit mode

JCXZ should have the 0x67 prefix only if we're in 32-bit mode, so make that
appropriately conditional. And JECXZ needs the prefix instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198757 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index e44574c31e231fd6be3c0133f04c1c4ec5c595bb..d3879e6c4cf29c9d56da5e81ca036e64e91709d7 100644 (file)
--- a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1161,7 +1161,11 @@ void X86MCCodeEmitter::EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
 
   // Emit the address size opcode prefix as needed.
   bool need_address_override;
-  if (TSFlags & X86II::AdSize) {
+  // The AdSize prefix is only for 32-bit and 64-bit modes; in 16-bit mode we
+  // need the address override only for JECXZ instead. Since it's only one
+  // instruction, we special-case it rather than introducing an AdSize16 bit.
+  if ((!is16BitMode() && TSFlags & X86II::AdSize) ||
+      (is16BitMode() && MI.getOpcode() == X86::JECXZ_32)) {
     need_address_override = true;
   } else if (MemOperand == -1) {
     need_address_override = false;

diff --git a/test/MC/X86/x86-16.s b/test/MC/X86/x86-16.s
index 9fdd8645e7add516e1adc570050508fb6efc5558..e395a779f2344b1b23aac2c2e3343f07d79b4854 100644 (file)
--- a/test/MC/X86/x86-16.s
+++ b/test/MC/X86/x86-16.s
@@ -356,6 +356,14 @@ cmovnae    %bx,%bx
 lcalll $0x2, $0x1234
 
 
+L1:
+  jcxz L1
+// CHECK: jcxz L1
+// CHECK:   encoding: [0xe3,A]
+  jecxz L1
+// CHECK: jecxz L1
+// CHECK:   encoding: [0x67,0xe3,A]
+
 iret
 // CHECK: iretw
 // CHECK: encoding: [0xcf]