Fix self-host; ensure signedness is consistent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163306 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 62c758931e1e8a3a1bf50960d889e786f47d99ce..5f3a9c773f2fa611338cb652697403582d7a725f 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -4175,7 +4175,7 @@ SDValue ARMTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
 
   // Map of the number of times a particular SDValue appears in the
   // element list.
-  DenseMap<SDValue, int> ValueCounts;
+  DenseMap<SDValue, unsigned> ValueCounts;
   SDValue Value;
   for (unsigned i = 0; i < NumElts; ++i) {
     SDValue V = Op.getOperand(i);
@@ -4187,7 +4187,7 @@ SDValue ARMTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
       isConstant = false;
 
     ValueCounts.insert(std::make_pair(V, 0));
-    int &Count = ValueCounts[V];
+    unsigned &Count = ValueCounts[V];
     
     // Is this value dominant? (takes up more than half of the lanes)
     if (++Count > (NumElts / 2)) {