Update some stuff now that the new rlwimi code has gone in
authorNate Begeman <natebegeman@mac.com>
Mon, 8 May 2006 02:52:38 +0000 (02:52 +0000)
committerNate Begeman <natebegeman@mac.com>
Mon, 8 May 2006 02:52:38 +0000 (02:52 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28162 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPCISelDAGToDAG.cpp
lib/Target/PowerPC/README.txt

index 26f1316899531fcf78b74cad8d0b542aee8d1742..11b0c3df222f5f50275371aa42f2b792c43bae79 100644 (file)
@@ -405,7 +405,6 @@ SDNode *PPCDAGToDAGISel::SelectBitfieldInsert(SDNode *N) {
   TLI.ComputeMaskedBits(Op0, TgtMask, LKZ, LKO);
   TLI.ComputeMaskedBits(Op1, TgtMask, RKZ, RKO);
   
-  // FIXME: rotrwi / rotlwi
   if ((LKZ | RKZ) == 0x00000000FFFFFFFFULL) {
     unsigned PInsMask = ~RKZ;
     unsigned PTgtMask = ~LKZ;
index bbe311cb38be81a13c2a6197d22c21c86ee35622..68fa8f2ae61cc922fe9fc3de0e69620bca7e366f 100644 (file)
@@ -85,75 +85,6 @@ more than one use.  Itanium will want this too.
 
 ===-------------------------------------------------------------------------===
 
-#define  ARRAY_LENGTH  16
-
-union bitfield {
-       struct {
-#ifndef        __ppc__
-               unsigned int                       field0 : 6;
-               unsigned int                       field1 : 6;
-               unsigned int                       field2 : 6;
-               unsigned int                       field3 : 6;
-               unsigned int                       field4 : 3;
-               unsigned int                       field5 : 4;
-               unsigned int                       field6 : 1;
-#else
-               unsigned int                       field6 : 1;
-               unsigned int                       field5 : 4;
-               unsigned int                       field4 : 3;
-               unsigned int                       field3 : 6;
-               unsigned int                       field2 : 6;
-               unsigned int                       field1 : 6;
-               unsigned int                       field0 : 6;
-#endif
-       } bitfields, bits;
-       unsigned int    u32All;
-       signed int      i32All;
-       float   f32All;
-};
-
-
-typedef struct program_t {
-       union bitfield    array[ARRAY_LENGTH];
-    int               size;
-    int               loaded;
-} program;
-
-
-void AdjustBitfields(program* prog, unsigned int fmt1)
-{
-        prog->array[0].bitfields.field0 = fmt1;
-        prog->array[0].bitfields.field1 = fmt1 + 1;
-}
-
-We currently generate:
-
-_AdjustBitfields:
-        lwz r2, 0(r3)
-        addi r5, r4, 1
-        rlwinm r2, r2, 0, 0, 19
-        rlwinm r5, r5, 6, 20, 25
-        rlwimi r2, r4, 0, 26, 31
-        or r2, r2, r5
-        stw r2, 0(r3)
-        blr
-
-We should teach someone that or (rlwimi, rlwinm) with disjoint masks can be
-turned into rlwimi (rlwimi)
-
-The better codegen would be:
-
-_AdjustBitfields:
-        lwz r0,0(r3)
-        rlwinm r4,r4,0,0xff
-        rlwimi r0,r4,0,26,31
-        addi r4,r4,1
-        rlwimi r0,r4,6,20,25
-        stw r0,0(r3)
-        blr
-
-===-------------------------------------------------------------------------===
-
 Compile this:
 
 int %f1(int %a, int %b) {