SDOperand SplitVecOp_BIT_CONVERT(SDNode *N);
SDOperand SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
SDOperand SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
- SDOperand SplitVecOp_RET(SDNode *N, unsigned OpNo);
SDOperand SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
SDOperand SplitVecOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo);
assert(0 && "Do not know how to split this operator's operand!");
abort();
case ISD::STORE: Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo); break;
- case ISD::RET: Res = SplitVecOp_RET(N, OpNo); break;
case ISD::BIT_CONVERT: Res = SplitVecOp_BIT_CONVERT(N); break;
return DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
}
-SDOperand DAGTypeLegalizer::SplitVecOp_RET(SDNode *N, unsigned OpNo) {
- assert(N->getNumOperands() == 3 &&"Can only handle ret of one vector so far");
- // FIXME: Returns of gcc generic vectors larger than a legal vector
- // type should be returned by reference!
- SDOperand Lo, Hi;
- GetSplitVector(N->getOperand(1), Lo, Hi);
-
- SDOperand Chain = N->getOperand(0); // The chain.
- SDOperand Sign = N->getOperand(2); // Signness
-
- return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Sign, Hi, Sign);
-}
-
SDOperand DAGTypeLegalizer::SplitVecOp_BIT_CONVERT(SDNode *N) {
// For example, i64 = BIT_CONVERT v4i16 on alpha. Typically the vector will
// end up being split all the way down to individual components. Convert the