//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "ctags-emitter"
-
#include "llvm/Support/SourceMgr.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/TableGen/Error.h"
#include <vector>
using namespace llvm;
+#define DEBUG_TYPE "ctags-emitter"
+
namespace llvm { extern SourceMgr SrcMgr; }
namespace {
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "regalloc-emitter"
-
#include "CodeGenRegisters.h"
#include "CodeGenTarget.h"
#include "llvm/ADT/IntEqClasses.h"
using namespace llvm;
+#define DEBUG_TYPE "regalloc-emitter"
+
//===----------------------------------------------------------------------===//
// CodeGenSubRegIndex
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "subtarget-emitter"
-
#include "CodeGenSchedule.h"
#include "CodeGenTarget.h"
#include "llvm/ADT/STLExtras.h"
using namespace llvm;
+#define DEBUG_TYPE "subtarget-emitter"
+
#ifndef NDEBUG
static void dumpIdxVec(const IdxVec &V) {
for (unsigned i = 0, e = V.size(); i < e; ++i) {
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "isel-opt"
#include "DAGISelMatcher.h"
#include "CodeGenDAGPatterns.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
+#define DEBUG_TYPE "isel-opt"
+
/// ContractNodes - Turn multiple matcher node patterns like 'MoveChild+Record'
/// into single compound nodes like RecordChild.
static void ContractNodes(std::unique_ptr<Matcher> &MatcherPtr,
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "decoder-emitter"
-
#include "CodeGenTarget.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/SmallString.h"
using namespace llvm;
+#define DEBUG_TYPE "decoder-emitter"
+
namespace {
struct EncodingField {
unsigned Base, Width, Offset;
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "pseudo-lowering"
#include "CodeGenInstruction.h"
#include "CodeGenTarget.h"
#include "llvm/ADT/IndexedMap.h"
#include <vector>
using namespace llvm;
+#define DEBUG_TYPE "pseudo-lowering"
+
namespace {
class PseudoLoweringEmitter {
struct OpData {
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "subtarget-emitter"
-
#include "CodeGenTarget.h"
#include "CodeGenSchedule.h"
#include "llvm/ADT/STLExtras.h"
#include <vector>
using namespace llvm;
+#define DEBUG_TYPE "subtarget-emitter"
+
namespace {
class SubtargetEmitter {
// Each processor has a SchedClassDesc table with an entry for each SchedClass.