add emitter support for integer constants and simple physreg references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96663 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/DAGISelHeader.h b/include/llvm/CodeGen/DAGISelHeader.h
index fd0c4f1f85725db02503af31fbfa4795bd2bee4a..1514dbaa702b32ec42cb008d31754bc693650faa 100644 (file)
--- a/include/llvm/CodeGen/DAGISelHeader.h
+++ b/include/llvm/CodeGen/DAGISelHeader.h
@@ -172,6 +172,11 @@ bool CheckOrImmediate(SDValue V, int64_t Val) {
   return true;
 }
 
+void EmitInteger(int64_t Val, MVT::SimpleValueType VT,
+                 SmallVectorImpl<SDValue> &RecordedNodes) {
+  RecordedNodes.push_back(CurDAG->getTargetConstant(Val, VT));
+}
+
 // These functions are marked always inline so that Idx doesn't get pinned to
 // the stack.
 ALWAYS_INLINE static int8_t
@@ -218,7 +223,10 @@ enum BuiltinOpcodes {
   OPC_CheckAndImm1, OPC_CheckAndImm2, OPC_CheckAndImm4, OPC_CheckAndImm8,
   OPC_CheckOrImm1, OPC_CheckOrImm2, OPC_CheckOrImm4, OPC_CheckOrImm8,
   OPC_CheckFoldableChainNode,
-  OPC_CheckChainCompatible
+  OPC_CheckChainCompatible,
+  
+  OPC_EmitInteger1, OPC_EmitInteger2, OPC_EmitInteger4, OPC_EmitInteger8,
+  OPC_EmitRegister
 };
 
 struct MatchScope {
@@ -417,6 +425,39 @@ SDNode *SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
         break;
       continue;
     }
+        
+    case OPC_EmitRegister: {
+      unsigned RegNo = MatcherTable[MatcherIndex++];
+      MVT::SimpleValueType VT =
+        (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+      SDValue Reg = CurDAG->getRegister(RegNo, VT);
+      RecordedNodes.push_back(N);
+      continue;
+    }
+    case OPC_EmitInteger1: {
+      MVT::SimpleValueType VT =
+        (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+      EmitInteger(GetInt1(MatcherTable, MatcherIndex), VT, RecordedNodes);
+      continue;
+    }
+    case OPC_EmitInteger2: {
+      MVT::SimpleValueType VT =
+        (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+      EmitInteger(GetInt2(MatcherTable, MatcherIndex), VT, RecordedNodes);
+      continue;
+    }
+    case OPC_EmitInteger4: {
+      MVT::SimpleValueType VT =
+        (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+      EmitInteger(GetInt4(MatcherTable, MatcherIndex), VT, RecordedNodes);
+      continue;
+    }
+    case OPC_EmitInteger8: {
+      MVT::SimpleValueType VT =
+       (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+      EmitInteger(GetInt8(MatcherTable, MatcherIndex), VT, RecordedNodes);
+      continue;
+    }
     }
     
     // If the code reached this point, then the match failed pop out to the next

diff --git a/utils/TableGen/DAGISelMatcher.h b/utils/TableGen/DAGISelMatcher.h
index 7b6fbdb8bf5e061bcdf327fba34d1b26ddc9ca1e..0d5825639d0077c127f717540d11f243f3086c38 100644 (file)
--- a/utils/TableGen/DAGISelMatcher.h
+++ b/utils/TableGen/DAGISelMatcher.h
@@ -386,7 +386,7 @@ public:
   EmitIntegerMatcherNode(int64_t val, MVT::SimpleValueType vt)
   : MatcherNode(EmitInteger), Val(val), VT(vt) {}
   
-  int64_t getVal() const { return Val; }
+  int64_t getValue() const { return Val; }
   MVT::SimpleValueType getVT() const { return VT; }
   
   static inline bool classof(const MatcherNode *N) {

diff --git a/utils/TableGen/DAGISelMatcherEmitter.cpp b/utils/TableGen/DAGISelMatcherEmitter.cpp
index 92b2a55e9b771c5da3928a7c4b57581e8b56320e..4b16db309b286497bf05c5a0aa89ae1a5e697b43 100644 (file)
--- a/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -213,10 +213,21 @@ EmitMatcher(const MatcherNode *N, unsigned Indent) {
        << cast<CheckChainCompatibleMatcherNode>(N)->getPreviousOp() << ",\n";
     return 2;
       
-  case MatcherNode::EmitInteger:
+  case MatcherNode::EmitInteger: {
+    int64_t Val = cast<EmitIntegerMatcherNode>(N)->getValue();
+    OS << "OPC_EmitInteger" << ClassifyInt(Val) << ", "
+       << getEnumName(cast<EmitIntegerMatcherNode>(N)->getVT()) << ", ";
+    return EmitInt(Val, OS)+2;
+  }
+      
   case MatcherNode::EmitRegister:
-      // FIXME: Implement.
-    return 0;
+    OS << "OPC_EmitRegister, "
+       << getEnumName(cast<EmitRegisterMatcherNode>(N)->getVT()) << ", ";
+    if (Record *R = cast<EmitRegisterMatcherNode>(N)->getReg())
+      OS << getQualifiedName(R) << ",\n";
+    else
+      OS << "0 /*zero_reg*/,\n";
+    return 3;
   }
   assert(0 && "Unreachable");
   return 0;