Start using tablegen'd instruction enum list

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7542 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index 9cb15c383c6f48ce7afe5c29f74cde7985fbf1ab..61d3123ef6b270a28f280f01ed43e485fe17ec7e 100644 (file)
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -47,15 +47,8 @@ Pass *createEmitX86CodeToMemory();
 //
 #include "X86GenRegisterNames.inc"
 
-/// X86 namespace - This namespace contains all of the register and opcode enums
-/// used by the X86 backend.
-///
-namespace X86 {
-  // This defines a large number of symbolic names for X86 instruction opcodes.
-  enum Opcode {
-#define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS, IMPDEFS, IMPUSES) ENUM,
-#include "X86InstrInfo.def"
-  };
-}
+// Defines symbolic names for the X86 instructions.
+//
+#include "X86GenInstrNames.inc"
 
 #endif