- class SimpleSpiller : public Spiller {
- public:
- bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap& vrm) {
- DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
- DEBUG(std::cerr << "********** Function: "
- << mf.getFunction()->getName() << '\n');
- const TargetMachine& tm = mf.getTarget();
- const MRegisterInfo& mri = *tm.getRegisterInfo();
-
- typedef DenseMap<bool, VirtReg2IndexFunctor> Loaded;
- Loaded loaded;
-
- for (MachineFunction::iterator mbbi = mf.begin(),
- mbbe = mf.end(); mbbi != mbbe; ++mbbi) {
- DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n");
- for (MachineBasicBlock::iterator mii = mbbi->begin(),
- mie = mbbi->end(); mii != mie; ++mii) {
- loaded.grow(mf.getSSARegMap()->getLastVirtReg());
- for (unsigned i = 0,e = mii->getNumOperands(); i != e; ++i){
- MachineOperand& mop = mii->getOperand(i);
- if (mop.isRegister() && mop.getReg() &&
- MRegisterInfo::isVirtualRegister(mop.getReg())) {
- unsigned virtReg = mop.getReg();
- unsigned physReg = vrm.getPhys(virtReg);
- if (mop.isUse() &&
- vrm.hasStackSlot(mop.getReg()) &&
- !loaded[virtReg]) {
- mri.loadRegFromStackSlot(
- *mbbi,
- mii,
- physReg,
- vrm.getStackSlot(virtReg));
- loaded[virtReg] = true;
- DEBUG(std::cerr << '\t';
- prior(mii)->print(std::cerr, &tm));
- ++numLoads;
- }
- if (mop.isDef() &&
- vrm.hasStackSlot(mop.getReg())) {
- mri.storeRegToStackSlot(
- *mbbi,
- next(mii),
- physReg,
- vrm.getStackSlot(virtReg));
- ++numStores;
- }
- mii->SetMachineOperandReg(i, physReg);
- }
- }
- DEBUG(std::cerr << '\t'; mii->print(std::cerr, &tm));
- loaded.clear();
- }
- }
- return true;
- }
- };
-
- class LocalSpiller : public Spiller {
- typedef std::vector<unsigned> Phys2VirtMap;
- typedef std::vector<bool> PhysFlag;
- typedef DenseMap<MachineInstr*, VirtReg2IndexFunctor> Virt2MI;
-
- MachineFunction* mf_;
- const TargetMachine* tm_;
- const TargetInstrInfo* tii_;
- const MRegisterInfo* mri_;
- const VirtRegMap* vrm_;
- Phys2VirtMap p2vMap_;
- PhysFlag dirty_;
- Virt2MI lastDef_;
-
- public:
- bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap& vrm) {
- mf_ = &mf;
- tm_ = &mf_->getTarget();
- tii_ = tm_->getInstrInfo();
- mri_ = tm_->getRegisterInfo();
- vrm_ = &vrm;
- p2vMap_.assign(mri_->getNumRegs(), 0);
- dirty_.assign(mri_->getNumRegs(), false);
-
- DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
- DEBUG(std::cerr << "********** Function: "
- << mf_->getFunction()->getName() << '\n');
-
- for (MachineFunction::iterator mbbi = mf_->begin(),
- mbbe = mf_->end(); mbbi != mbbe; ++mbbi) {
- lastDef_.grow(mf_->getSSARegMap()->getLastVirtReg());
- DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n");
- eliminateVirtRegsInMbb(*mbbi);
- // clear map, dirty flag and last ref
- p2vMap_.assign(p2vMap_.size(), 0);
- dirty_.assign(dirty_.size(), false);
- lastDef_.clear();
- }
- return true;
+bool SimpleSpiller::runOnMachineFunction(MachineFunction& MF,
+ const VirtRegMap& VRM) {
+ DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
+ DEBUG(std::cerr << "********** Function: "
+ << MF.getFunction()->getName() << '\n');
+ const TargetMachine& TM = MF.getTarget();
+ const MRegisterInfo& mri = *TM.getRegisterInfo();
+
+ DenseMap<bool, VirtReg2IndexFunctor> Loaded;
+
+ for (MachineFunction::iterator mbbi = MF.begin(), E = MF.end();
+ mbbi != E; ++mbbi) {
+ DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n");
+ for (MachineBasicBlock::iterator mii = mbbi->begin(),
+ mie = mbbi->end(); mii != mie; ++mii) {
+ Loaded.grow(MF.getSSARegMap()->getLastVirtReg());
+ for (unsigned i = 0,e = mii->getNumOperands(); i != e; ++i){
+ MachineOperand& mop = mii->getOperand(i);
+ if (mop.isRegister() && mop.getReg() &&
+ MRegisterInfo::isVirtualRegister(mop.getReg())) {
+ unsigned virtReg = mop.getReg();
+ unsigned physReg = VRM.getPhys(virtReg);
+ if (mop.isUse() && VRM.hasStackSlot(mop.getReg()) &&
+ !Loaded[virtReg]) {
+ mri.loadRegFromStackSlot(*mbbi, mii, physReg,
+ VRM.getStackSlot(virtReg));
+ Loaded[virtReg] = true;
+ DEBUG(std::cerr << '\t';
+ prior(mii)->print(std::cerr, &TM));
+ ++NumLoads;
+ }
+
+ if (mop.isDef() && VRM.hasStackSlot(mop.getReg())) {
+ mri.storeRegToStackSlot(*mbbi, next(mii), physReg,
+ VRM.getStackSlot(virtReg));
+ ++NumStores;
+ }
+ mii->SetMachineOperandReg(i, physReg);