Some more code clean up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34700 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index 4a82fc5ef63325bc80852e75909d104bb5690553..52dae023ee981907b2520d1496faa1db080eea6b 100644 (file)
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -29,8 +29,9 @@ class RegScavenger {
   MachineBasicBlock::iterator MBBI;
   unsigned NumPhysRegs;
 
-  /// Initialized - All states are initialized and ready to go!
-  bool Initialized;
+  /// Tracking - True if RegScavenger is currently tracking the liveness of 
+  /// registers.
+  bool Tracking;
 
   /// RegStates - The current state of all the physical registers immediately
   /// before MBBI. One bit per physical register. If bit is set that means it's
@@ -39,14 +40,14 @@ class RegScavenger {
 
 public:
   RegScavenger()
-    : MBB(NULL), Initialized(false) {};
+    : MBB(NULL), NumPhysRegs(0), Tracking(false) {};
 
   RegScavenger(MachineBasicBlock *mbb)
-    : MBB(mbb), Initialized(false) {};
+    : MBB(mbb), NumPhysRegs(0), Tracking(false) {};
 
   /// Init - Initialize the states.
   ///
-  void init(MachineBasicBlock *mbb = NULL);
+  void init(MachineBasicBlock *mbb);
 
   /// Reset - Discard previous states and re-initialize the states given for
   /// the specific basic block.

diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index 6856511bcee2d421719faac619ba944d3e150ff0..c921e201b90f947d8e1b3d0ac8599f20428a965b 100644 (file)
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -26,44 +26,50 @@
 using namespace llvm;
 
 void RegScavenger::init(MachineBasicBlock *mbb) {
-  if (mbb)
-    MBB = mbb;
-
-  const MachineFunction &MF = *MBB->getParent();
+  const MachineFunction &MF = *mbb->getParent();
   const TargetMachine &TM = MF.getTarget();
   const MRegisterInfo *RegInfo = TM.getRegisterInfo();
 
-  MBBI = MBB->begin();
-  NumPhysRegs = RegInfo->getNumRegs();
-  RegStates.resize(NumPhysRegs, true);
+  assert((NumPhysRegs == 0 || NumPhysRegs == RegInfo->getNumRegs()) &&
+         "Target changed?");
+
+  if (!MBB) {
+    NumPhysRegs = RegInfo->getNumRegs();
+    ReservedRegs = RegInfo->getReservedRegs(MF);
+    RegStates.resize(NumPhysRegs);
+
+    // Create callee-saved registers bitvector.
+    CalleeSavedRegs.resize(NumPhysRegs);
+    const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
+    if (CSRegs != NULL)
+      for (unsigned i = 0; CSRegs[i]; ++i)
+        CalleeSavedRegs.set(CSRegs[i]);
+  }
+
+  MBB = mbb;
+
+  // All registers started out unused.
+  RegStates.set();
 
   // Create reserved registers bitvector.
-  ReservedRegs = RegInfo->getReservedRegs(MF);
   RegStates ^= ReservedRegs;
 
-  // Create callee-saved registers bitvector.
-  CalleeSavedRegs.resize(NumPhysRegs);
-  const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
-  if (CSRegs != NULL)
-    for (unsigned i = 0; CSRegs[i]; ++i)
-      CalleeSavedRegs.set(CSRegs[i]);
-
   // Live-in registers are in use.
   if (!MBB->livein_empty())
     for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
            E = MBB->livein_end(); I != E; ++I)
       setUsed(*I);
-
-  Initialized = true;
 }
 
 void RegScavenger::forward() {
-  assert(MBBI != MBB->end() && "Already at the end of the basic block!");
   // Move ptr forward.
-  if (!Initialized)
-    init();
-  else
+  if (!Tracking) {
+    MBBI = MBB->begin();
+    Tracking = true;
+  } else {
+    assert(MBBI != MBB->end() && "Already at the end of the basic block!");
     MBBI = next(MBBI);
+  }
 
   MachineInstr *MI = MBBI;
   // Process uses first.
@@ -102,6 +108,7 @@ void RegScavenger::forward() {
 }
 
 void RegScavenger::backward() {
+  assert(Tracking && "Not tracking states!");
   assert(MBBI != MBB->begin() && "Already at start of basic block!");
   // Move ptr backward.
   MBBI = prior(MBBI);
@@ -168,7 +175,6 @@ void RegScavenger::clear() {
     MBB = NULL;
   }
 
-  NumPhysRegs = 0;
-  Initialized = false;
+  Tracking = false;
   RegStates.clear();
 }