Mark MOVNTI as being supported in SSE2 OR AVX mode. This instruction has no AVX equiv...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147766 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index fcca32593c3770242f960b024dac354be6f73e28..668de242827a4191b0f5567b3f627cc0edc4e465 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -3304,11 +3304,11 @@ def : Pat<(alignednontemporalstore (v2i64 VR128:$src), addr:$dst),
 def MOVNTImr : I<0xC3, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
                  "movnti{l}\t{$src, $dst|$dst, $src}",
                  [(nontemporalstore (i32 GR32:$src), addr:$dst)]>,
-               TB, Requires<[HasSSE2]>;
+               TB, Requires<[HasXMMInt]>;
 def MOVNTI_64mr : RI<0xC3, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
                      "movnti{q}\t{$src, $dst|$dst, $src}",
                      [(nontemporalstore (i64 GR64:$src), addr:$dst)]>,
-                  TB, Requires<[HasSSE2]>;
+                  TB, Requires<[HasXMMInt]>;
 }
 
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