R600/SI: Add pattern for sign extension of i1 to i32.
authorMichel Danzer <michel.daenzer@amd.com>
Fri, 22 Feb 2013 11:22:58 +0000 (11:22 +0000)
committerMichel Danzer <michel.daenzer@amd.com>
Fri, 22 Feb 2013 11:22:58 +0000 (11:22 +0000)
16 more little piglits with radeonsi.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175887 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/R600/SIInstructions.td

index 2e43f9e5fdb22b715f6284bb5a4dc7921f8edd2d..907cf49c6c3b4455adc377a94ba3dc8d25a94149 100644 (file)
@@ -1382,6 +1382,11 @@ def : Pat <
                   0, 0, 0, 0), sub3)
 >;
 
+def : Pat <
+  (i32 (sext (i1 SReg_64:$src0))),
+  (V_CNDMASK_B32_e64 (i32 0), (i32 -1), SReg_64:$src0)
+>;
+
 /********** ================== **********/
 /**********   VOP3 Patterns    **********/
 /********** ================== **********/