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Move setOperationAction for CONCAT_VECTORS for 256-bit vectors into loop since all...
author
Craig Topper
<craig.topper@gmail.com>
Sat, 11 Aug 2012 22:34:26 +0000
(22:34 +0000)
committer
Craig Topper
<craig.topper@gmail.com>
Sat, 11 Aug 2012 22:34:26 +0000
(22:34 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161730
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
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diff --git
a/lib/Target/X86/X86ISelLowering.cpp
b/lib/Target/X86/X86ISelLowering.cpp
index c2a81c984ff28692053967be711cd22f698b88c2..af1675b4d94ccb73d34b882df2d36927b7231cf3 100644
(file)
--- a/
lib/Target/X86/X86ISelLowering.cpp
+++ b/
lib/Target/X86/X86ISelLowering.cpp
@@
-1043,13
+1043,6
@@
X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::SINT_TO_FP, MVT::v8i32, Legal);
setOperationAction(ISD::FP_ROUND, MVT::v4f32, Legal);
setOperationAction(ISD::SINT_TO_FP, MVT::v8i32, Legal);
setOperationAction(ISD::FP_ROUND, MVT::v4f32, Legal);
- setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f64, Custom);
- setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i64, Custom);
- setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom);
- setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i32, Custom);
- setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i8, Custom);
- setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i16, Custom);
-
setOperationAction(ISD::SRL, MVT::v16i16, Custom);
setOperationAction(ISD::SRL, MVT::v32i8, Custom);
setOperationAction(ISD::SRL, MVT::v16i16, Custom);
setOperationAction(ISD::SRL, MVT::v32i8, Custom);
@@
-1081,6
+1074,7
@@
X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::FMA, MVT::f32, Custom);
setOperationAction(ISD::FMA, MVT::f64, Custom);
}
setOperationAction(ISD::FMA, MVT::f32, Custom);
setOperationAction(ISD::FMA, MVT::f64, Custom);
}
+
if (Subtarget->hasAVX2()) {
setOperationAction(ISD::ADD, MVT::v4i64, Legal);
setOperationAction(ISD::ADD, MVT::v8i32, Legal);
if (Subtarget->hasAVX2()) {
setOperationAction(ISD::ADD, MVT::v4i64, Legal);
setOperationAction(ISD::ADD, MVT::v8i32, Legal);
@@
-1152,6
+1146,7
@@
X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::EXTRACT_VECTOR_ELT, SVT, Custom);
setOperationAction(ISD::SCALAR_TO_VECTOR, SVT, Custom);
setOperationAction(ISD::INSERT_SUBVECTOR, SVT, Custom);
setOperationAction(ISD::EXTRACT_VECTOR_ELT, SVT, Custom);
setOperationAction(ISD::SCALAR_TO_VECTOR, SVT, Custom);
setOperationAction(ISD::INSERT_SUBVECTOR, SVT, Custom);
+ setOperationAction(ISD::CONCAT_VECTORS, SVT, Custom);
}
// Promote v32i8, v16i16, v8i32 select, and, or, xor to v4i64.
}
// Promote v32i8, v16i16, v8i32 select, and, or, xor to v4i64.