let Inst{10-6} = fd;
let Inst{5-0} = 0x11;
}
+
+class BARRIER_FM<bits<5> op> : StdArch {
+ bits<32> Inst;
+
+ let Inst{31-26} = 0; // SPECIAL
+ let Inst{25-21} = 0;
+ let Inst{20-16} = 0; // rt = 0
+ let Inst{15-11} = 0; // rd = 0
+ let Inst{10-6} = op; // Operation
+ let Inst{5-0} = 0; // SLL
+}
def MFC2 : MFC3OP<"mfc2", GPR32Opnd>, MFC3OP_FM<0x12, 0>;
def MTC2 : MFC3OP<"mtc2", GPR32Opnd>, MFC3OP_FM<0x12, 4>;
+class Barrier<string asmstr> : InstSE<(outs), (ins), asmstr, [], NoItinerary,
+ FrmOther>;
+def SSNOP : Barrier<"ssnop">, BARRIER_FM<1>;
+def EHB : Barrier<"ehb">, BARRIER_FM<3>;
+def PAUSE : Barrier<"pause">, BARRIER_FM<5>, Requires<[HasMips32r2]>;
+
//===----------------------------------------------------------------------===//
// Instruction aliases
//===----------------------------------------------------------------------===//
tlbr
tlbwi
tlbwr
- ehb
lwc0 c0_entrylo,-7321($s2)
lwc3 $10,-32265($k0)
- ssnop
swc0 c0_prid,18904($s3)
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
divu $zero,$t9,$t7
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
lb $t8,-14515($t2)
lbu $t0,30195($v1)
lh $t3,-8556($s5)
sltu $s4,$s5,$t3
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
# XFAIL: *
.set noat
- ehb
ldc3 $29,-28645($s1)
lwc3 $10,-32265($k0)
sdc3 $12,5835($t2)
- ssnop
tlbp
tlbr
tlbwi
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
divu $zero,$t9,$t7
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
floor.w.d $f14,$f11
floor.w.s $f8,$f9
lb $t8,-14515($t2)
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
# XFAIL: *
.set noat
- ehb
lwc3 $10,-32265($k0)
- ssnop
tlbp
tlbr
tlbwi
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
--- /dev/null
+# Instructions that are invalid
+#
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 \
+# RUN: 2>%t1
+# RUN: FileCheck %s < %t1
+
+ .set noat
+ pause # CHECK: requires a CPU feature not currently enabled
c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24
c.un.s $fcc1,$f30,$f4
- ehb
ldc3 $29,-28645($s1)
rorv $t5,$a3,$s5
sdc3 $12,5835($t2)
- ssnop
tlbp
tlbr
tlbwi
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
divu $zero,$t9,$t7
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret
floor.w.d $f14,$f11
floor.w.s $f8,$f9
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
dpsu.h.qbr $ac2,$a1,$s6
dpsx.w.ph $ac0,$s7,$gp
dvpe $s6
- ehb
emt $t0
evpe $v0
extpdpv $s6,$ac0,$s8
nor.v $w20,$w20,$w15
or.v $w13,$w23,$w12
packrl.ph $ra,$t8,$t6
- pause
pcnt.b $w30,$w15
pcnt.d $w5,$w16
pcnt.h $w20,$w24
shrav_r.w $s7,$s4,$s6
shrlv.ph $t6,$t2,$t1
shrlv.qb $a2,$s2,$t3
- ssnop
sub.ps $f5,$f14,$f26
subq.ph $ra,$t1,$s8
subq_s.ph $t5,$s8,$s5
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
divu $zero,$t9,$t7
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
ei $t6
eret
floor.w.d $f14,$f11
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
+ pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
rdhwr $sp,$11
round.w.d $f6,$f4
round.w.s $f27,$f28
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24
c.un.s $fcc1,$f30,$f4
- ehb
madd.d $f18,$f19,$f26,$f20
madd.s $f1,$f31,$f19,$f25
msub.d $f10,$f1,$f31,$f18
recip.s $f3,$f30
rsqrt.d $f3,$f28
rsqrt.s $f4,$f8
- ssnop
tlbp
tlbr
tlbwi
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
cvt.ps.s $f3,$f18,$f19
cvt.s.pl $f30,$f1
cvt.s.pu $f14,$f25
- ehb
madd.d $f18,$f19,$f26,$f20
madd.ps $f22,$f3,$f14,$f3
madd.s $f1,$f31,$f19,$f25
recip.s $f3,$f30
rsqrt.d $f3,$f28
rsqrt.s $f4,$f8
- ssnop
sub.ps $f5,$f14,$f26
tlbp
tlbr
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
--- /dev/null
+# Instructions that are invalid
+#
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 \
+# RUN: 2>%t1
+# RUN: FileCheck %s < %t1
+
+ .set noat
+ pause # CHECK: requires a CPU feature not currently enabled
cvt.s.pu $f14,$f25
dmfc0 $t2,c0_watchhi,2
dmtc0 $t7,c0_datalo
- ehb
madd.d $f18,$f19,$f26,$f20
madd.ps $f22,$f3,$f14,$f3
madd.s $f1,$f31,$f19,$f25
recip.s $f3,$f30
rsqrt.d $f3,$f28
rsqrt.s $f4,$f8
- ssnop
sub.ps $f5,$f14,$f26
tlbp
tlbr
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
dpsx.w.ph $ac0,$s7,$gp
drorv $at,$a1,$s7
dvpe $s6
- ehb
emt $t0
evpe $v0
extpdpv $s6,$ac0,$s8
nor.v $w20,$w20,$w15
or.v $w13,$w23,$w12
packrl.ph $ra,$t8,$t6
- pause
pcnt.b $w30,$w15
pcnt.d $w5,$w16
pcnt.h $w20,$w24
shrav_r.w $s7,$s4,$s6
shrlv.ph $t6,$t2,$t1
shrlv.qb $a2,$s2,$t3
- ssnop
sub.ps $f5,$f14,$f26
subq.ph $ra,$t1,$s8
subq_s.ph $t5,$s8,$s5
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
ei $t6
eret
floor.l.d $f26,$f7
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
+ pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
rdhwr $sp,$11
round.l.d $f12,$f1
round.l.s $f25,$f5
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22