Add intrinsics for the testct, testwct instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135475 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/IntrinsicsXCore.td b/include/llvm/IntrinsicsXCore.td
index 5ea4acece902fb91887b08b85c48737c98641b8b..199b66648cb7fea75ff4417323cb465e479f6e91 100644 (file)
--- a/include/llvm/IntrinsicsXCore.td
+++ b/include/llvm/IntrinsicsXCore.td
@@ -40,6 +40,10 @@ let TargetPrefix = "xcore" in {  // All intrinsics start with "llvm.xcore.".
                                   [NoCapture<0>]>;
   def int_xcore_chkct : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
                                   [NoCapture<0>]>;
+  def int_xcore_testct : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty],
+                                   [NoCapture<0>]>;
+  def int_xcore_testwct : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty],
+                                    [NoCapture<0>]>;
   def int_xcore_setd : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
                                   [NoCapture<0>]>;
   def int_xcore_setc : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],

diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td
index c615d9f287a356a1cb8f2287230d48341dff3398..db05fff5a95ec8c7eee9c7672a7b9efd36d660d8 100644 (file)
--- a/lib/Target/XCore/XCoreInstrInfo.td
+++ b/lib/Target/XCore/XCoreInstrInfo.td
@@ -754,7 +754,7 @@ def BL_lu10 : _FLU10<
 }
 
 // Two operand short
-// TODO eet, eef, testwct, tsetmr, sext (reg), zext (reg)
+// TODO eet, eef, tsetmr, sext (reg), zext (reg)
 def NOT : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
                  "not $dst, $b",
                  [(set GRRegs:$dst, (not GRRegs:$b))]>;
@@ -846,6 +846,14 @@ def CHKCT_rus : _F2R<(outs), (ins GRRegs:$r, i32imm:$val),
                  "chkct res[$r], $val",
                  [(int_xcore_chkct GRRegs:$r, immUs:$val)]>;
 
+def TESTCT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$src),
+                     "testct $dst, res[$src]",
+                     [(set GRRegs:$dst, (int_xcore_testct GRRegs:$src))]>;
+
+def TESTWCT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$src),
+                      "testwct $dst, res[$src]",
+                      [(set GRRegs:$dst, (int_xcore_testwct GRRegs:$src))]>;
+
 def SETD_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
                  "setd res[$r], $val",
                  [(int_xcore_setd GRRegs:$r, GRRegs:$val)]>;

diff --git a/test/CodeGen/XCore/resources.ll b/test/CodeGen/XCore/resources.ll
index 9e5f9cc4bfbfc5de1e5f6dcd42445ddc1aa56ea9..f0f528f37d8317513bf1b9b3707d039d9217b586 100644 (file)
--- a/test/CodeGen/XCore/resources.ll
+++ b/test/CodeGen/XCore/resources.ll
@@ -9,6 +9,8 @@ declare void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
 declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
 declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
 declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
+declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
+declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
 declare void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
 declare void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value)
 declare i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value)
@@ -214,3 +216,17 @@ define i32 @endin(i8 addrspace(1)* %r) {
        %result = call i32 @llvm.xcore.endin.p1i8(i8 addrspace(1)* %r)
        ret i32 %result
 }
+
+define i32 @testct(i8 addrspace(1)* %r) {
+; CHECK: testct:
+; CHECK: testct r0, res[r0]
+       %result = call i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
+       ret i32 %result
+}
+
+define i32 @testwct(i8 addrspace(1)* %r) {
+; CHECK: testwct:
+; CHECK: testwct r0, res[r0]
+       %result = call i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
+       ret i32 %result
+}