Fix a tblgen bug.

Given the pattern below as an example:
list<dag> Pattern = [(set RC:$dst, (v4f32 (shufp:src3 RC:$src1,
                            (mem_frag addr:$src2))))];

The right reference resolving should lead to:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp:src3 VR128:$src1,
                            (mem_frag addr:$src2))))];
But was yielding:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp VR128:$src1,
                            (mem_frag addr:$src2))))];

Fix this by passing the right name when creating a new DagInit node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106670 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/TableGen/usevalname.td b/test/TableGen/usevalname.td
new file mode 100644 (file)
index 0000000..1b31c8f
--- /dev/null
+++ b/test/TableGen/usevalname.td
@@ -0,0 +1,24 @@
+// RUN: tblgen %s | FileCheck %s
+// XFAIL: vg_leak
+
+class Instr<list<dag> pat> {
+  list<dag> Pattern = pat;
+}
+
+class Reg {
+  int a = 3;
+}
+
+def VR128 : Reg;
+def mem_frag;
+def set;
+def addr;
+def shufp : Reg;
+
+multiclass shuffle<Reg RC> {
+  def rri : Instr<[(set RC:$dst, (shufp:$src3
+                                       RC:$src1, RC:$src2))]>;
+}
+
+// CHECK: shufp:src3
+defm ADD : shuffle<VR128>;

diff --git a/utils/TableGen/Record.cpp b/utils/TableGen/Record.cpp
index 5a69edb615de207ac133c5025910f50b97bf2cd8..d2cf379907f64465338f58998f9b9d3ffd787ec2 100644 (file)
--- a/utils/TableGen/Record.cpp
+++ b/utils/TableGen/Record.cpp
@@ -1262,7 +1262,7 @@ Init *DagInit::resolveReferences(Record &R, const RecordVal *RV) {
   Init *Op = Val->resolveReferences(R, RV);
 
   if (Args != NewArgs || Op != Val)
-    return new DagInit(Op, "", NewArgs, ArgNames);
+    return new DagInit(Op, ValName, NewArgs, ArgNames);
 
   return this;
 }