ARM: fix B decoding

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183914 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index a6eab33af372fbf1b239e2e248857416dd86d048..4086f36ccb03afad5c99b428e5597b61b8e2d7a0 100644 (file)
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -2104,7 +2104,7 @@ DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
   unsigned imm10 = fieldFromInstruction(Insn, 16, 10);
   unsigned imm11 = fieldFromInstruction(Insn, 0, 11);
   unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11;
-  int imm32 = SignExtend32<24>(tmp << 1);
+  int imm32 = SignExtend32<25>(tmp << 1);
   if (!tryAddingSymbolicOperand(Address, Address + imm32 + 4,
                                 true, 4, Inst, Decoder))
     Inst.addOperand(MCOperand::CreateImm(imm32));

diff --git a/test/MC/Disassembler/ARM/thumb2.txt b/test/MC/Disassembler/ARM/thumb2.txt
index fc237ab0f7b2abb91c9539461daf5a6309ce3b0c..a681e2a6f9fa3769f916e4f384924d0aacd32bc0 100644 (file)
--- a/test/MC/Disassembler/ARM/thumb2.txt
+++ b/test/MC/Disassembler/ARM/thumb2.txt
@@ -170,8 +170,10 @@
 0x13 0xf5 0xce 0xa9
 
 # CHECK: b.w   #208962
+# CHECK: b.w   #-16777216
 
 0x33 0xf0 0x21 0xb8 # rdar://12585795
+0x00 0xf4 0x00 0x90
 
 #------------------------------------------------------------------------------
 # BFC