Sort sub-registers and super-registers lists according to super-sub register relation...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49714 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h
index 5bf1f77ec59be868ca5b212e2b1c6421a9d63227..e902cafa9bdb34a1691a4ebcd616459d866f3204 100644 (file)
--- a/include/llvm/Target/TargetRegisterInfo.h
+++ b/include/llvm/Target/TargetRegisterInfo.h
@@ -353,9 +353,10 @@ public:
     return get(RegNo).AliasSet;
   }
 
-  /// getSubRegisters - Return the set of registers that are sub-registers of
+  /// getSubRegisters - Return the list of registers that are sub-registers of
   /// the specified register, or a null list of there are none. The list
-  /// returned is zero terminated.
+  /// returned is zero terminated and sorted according to super-sub register
+  /// relations. e.g. X86::RAX's sub-register list is EAX, AX, AL, AH.
   ///
   const unsigned *getSubRegisters(unsigned RegNo) const {
     return get(RegNo).SubRegs;
@@ -369,9 +370,10 @@ public:
     return get(RegNo).ImmSubRegs;
   }
 
-  /// getSuperRegisters - Return the set of registers that are super-registers
+  /// getSuperRegisters - Return the list of registers that are super-registers
   /// of the specified register, or a null list of there are none. The list
-  /// returned is zero terminated.
+  /// returned is zero terminated and sorted according to super-sub register
+  /// relations. e.g. X86::AL's super-register list is RAX, EAX, AX.
   ///
   const unsigned *getSuperRegisters(unsigned RegNo) const {
     return get(RegNo).SuperRegs;

diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 2e19202caa5313c91341db0bb8ae74fb75450f13..ce95390054f8aa27550d2265ce90c7f75672a5ff 100644 (file)
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -153,6 +153,20 @@ static void addSubSuperReg(Record *R, Record *S,
       addSubSuperReg(R, *I, SubRegs, SuperRegs, Aliases);
 }
 
+class RegisterSorter {
+private:
+  std::map<Record*, std::set<Record*> > &RegisterSubRegs;
+
+public:
+  RegisterSorter(std::map<Record*, std::set<Record*> > &RS)
+    : RegisterSubRegs(RS) {};
+
+  bool operator()(Record *RegA, Record *RegB) {
+    // B is sub-register of A.
+    return RegisterSubRegs.count(RegA) && RegisterSubRegs[RegA].count(RegB);
+  }
+};
+
 // RegisterInfoEmitter::run - Main register file description emitter.
 //
 void RegisterInfoEmitter::run(std::ostream &OS) {
@@ -474,9 +488,14 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
   for (std::map<Record*, std::set<Record*> >::iterator
          I = RegisterSubRegs.begin(), E = RegisterSubRegs.end(); I != E; ++I) {
     OS << "  const unsigned " << I->first->getName() << "_SubRegsSet[] = { ";
+    std::vector<Record*> SubRegsVector;
     for (std::set<Record*>::iterator ASI = I->second.begin(),
            E = I->second.end(); ASI != E; ++ASI)
-      OS << getQualifiedName(*ASI) << ", ";
+      SubRegsVector.push_back(*ASI);
+    RegisterSorter RS(RegisterSubRegs);
+    std::stable_sort(SubRegsVector.begin(), SubRegsVector.end(), RS);
+    for (unsigned i = 0, e = SubRegsVector.size(); i != e; ++i)
+      OS << getQualifiedName(SubRegsVector[i]) << ", ";
     OS << "0 };\n";
   }
 
@@ -505,9 +524,15 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
   for (std::map<Record*, std::set<Record*> >::iterator
          I = RegisterSuperRegs.begin(), E = RegisterSuperRegs.end(); I != E; ++I) {
     OS << "  const unsigned " << I->first->getName() << "_SuperRegsSet[] = { ";
+
+    std::vector<Record*> SuperRegsVector;
     for (std::set<Record*>::iterator ASI = I->second.begin(),
            E = I->second.end(); ASI != E; ++ASI)
-      OS << getQualifiedName(*ASI) << ", ";
+      SuperRegsVector.push_back(*ASI);
+    RegisterSorter RS(RegisterSubRegs);
+    std::stable_sort(SuperRegsVector.begin(), SuperRegsVector.end(), RS);
+    for (unsigned i = 0, e = SuperRegsVector.size(); i != e; ++i)
+      OS << getQualifiedName(SuperRegsVector[i]) << ", ";
     OS << "0 };\n";
   }