Revert " mips32 long long register inline asm constraint support." as
authorEric Christopher <echristo@apple.com>
Mon, 2 Jul 2012 23:22:25 +0000 (23:22 +0000)
committerEric Christopher <echristo@apple.com>
Mon, 2 Jul 2012 23:22:25 +0000 (23:22 +0000)
it appears to be breaking the bots.

This reverts commit 1b055ce320fa13f6f1ac81670d11b45e01f79876.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159619 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/MipsISelLowering.cpp
test/CodeGen/Mips/inlineasm-operand-code.ll

index a7e2aa32fc6bdd5afc77cea69178a54b63b31df7..abf22bd8041f3b878b3f94a0f8a06e5924f5d161 100644 (file)
@@ -3355,8 +3355,6 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const
     case 'r':
       if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8)
         return std::make_pair(0U, &Mips::CPURegsRegClass);
-      if (VT == MVT::i64 && !HasMips64)
-        return std::make_pair(0U, &Mips::CPURegsRegClass);
       if (VT == MVT::i64 && HasMips64)
         return std::make_pair(0U, &Mips::CPU64RegsRegClass);
       // This will generate an error message
index d75f7f2f806e4efed33e56bb64cd864b5f2f21e3..ca4f3e4c5aed19b05c33273bca811951e7548da0 100644 (file)
@@ -41,11 +41,5 @@ entry:
 ;CHECK:        #NO_APP
   tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
 
-; a long long in 32 bit mode (use to assert)
-;CHECK:        #APP
-;CHECK:        addi ${{[0-9]+}},${{[0-9]+}},3
-;CHECK:        #NO_APP
-  tail call i64 asm sideeffect "addi $0,$1,$2 \0A\09", "=r,r,X"(i64 1229801703532086340, i64 3) nounwind
-
   ret i32 0
 }