Handle dbg_value instructions (i.e., skip them) when generating IT blocks.

rdar://7797940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105557 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/Thumb2ITBlockPass.cpp b/lib/Target/ARM/Thumb2ITBlockPass.cpp
index f36d4ef7567ee650fe9b0f115d55ac6054e73221..065f657f5d66a95ef5202ee35c9bc9178c170664 100644 (file)
--- a/lib/Target/ARM/Thumb2ITBlockPass.cpp
+++ b/lib/Target/ARM/Thumb2ITBlockPass.cpp
@@ -71,8 +71,10 @@ bool Thumb2ITBlockPass::InsertITBlocks(MachineBasicBlock &MBB) {
     unsigned Mask = 0, Pos = 3;
     // Branches, including tricky ones like LDM_RET, need to end an IT
     // block so check the instruction we just put in the block.
-    while (MBBI != E && Pos &&
-           (!MI->getDesc().isBranch() && !MI->getDesc().isReturn())) {
+    for (; MBBI != E && Pos &&
+           (!MI->getDesc().isBranch() && !MI->getDesc().isReturn()) ; ++MBBI) {
+      if (MBBI->isDebugValue())
+        continue;
       MachineInstr *NMI = &*MBBI;
       MI = NMI;
       DebugLoc ndl = NMI->getDebugLoc();
@@ -83,7 +85,6 @@ bool Thumb2ITBlockPass::InsertITBlocks(MachineBasicBlock &MBB) {
       else
         break;
       --Pos;
-      ++MBBI;
     }
     Mask |= (1 << Pos);
     // Tag along (firstcond[0] << 4) with the mask.