class JumpLinkRegMM<string opstr, RegisterOperand RO>:
InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
[], IIBranch, FrmR>;
+
+ class BranchCompareToZeroLinkMM<string opstr, DAGOperand opnd,
+ RegisterOperand RO> :
+ InstSE<(outs), (ins RO:$rs, opnd:$offset),
+ !strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI, opstr>;
}
def MFHI16_MM : MoveFromHILOMM<"mfhi", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x10>;
def BLTZAL_MM : MMRel, BGEZAL_FT<"bltzal", brtarget_mm, GPR32Opnd>,
BGEZAL_FM_MM<0x01>;
+ /// Branch Instructions - Short Delay Slot
+ def BGEZALS_MM : BranchCompareToZeroLinkMM<"bgezals", brtarget_mm,
+ GPR32Opnd>, BGEZAL_FM_MM<0x13>;
+ def BLTZALS_MM : BranchCompareToZeroLinkMM<"bltzals", brtarget_mm,
+ GPR32Opnd>, BGEZAL_FM_MM<0x11>;
+
/// Control Instructions
def SYNC_MM : MMRel, SYNC_FT<"sync">, SYNC_FM_MM;
def BREAK_MM : MMRel, BRK_FT<"break">, BRK_FM_MM;
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EL: bltz $6, 1332 # encoding: [0x06,0x40,0x9a,0x02]
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EL: bgezals $6, 1332 # encoding: [0x66,0x42,0x9a,0x02]
+# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
+# CHECK-EL: bltzals $6, 1332 # encoding: [0x26,0x42,0x9a,0x02]
+# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
#------------------------------------------------------------------------------
# Big endian
#------------------------------------------------------------------------------
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EB: bltz $6, 1332 # encoding: [0x40,0x06,0x02,0x9a]
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EB: bgezals $6, 1332 # encoding: [0x42,0x66,0x02,0x9a]
+# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
+# CHECK-EB: bltzals $6, 1332 # encoding: [0x42,0x26,0x02,0x9a]
+# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
b 1332
beq $9,$6,1332
bne $9,$6,1332
bal 1332
bltz $6,1332
+ bgezals $6,1332
+ bltzals $6,1332