#ifndef TARGET_POWERPC_H
#define TARGET_POWERPC_H
+#include <iosfwd>
+
namespace llvm {
class FunctionPass;
+class TargetMachine;
FunctionPass *createPowerPCPEI();
FunctionPass *createPPCBranchSelectionPass();
+FunctionPass *createPPC32ISelSimple(TargetMachine &TM);
+FunctionPass *createPPC64ISelSimple(TargetMachine &TM);
+FunctionPass *createPPC32AsmPrinter(std::ostream &OS,TargetMachine &TM);
} // end namespace llvm;
+++ /dev/null
-//===-- PPC32.h - Top-level interface for 32-bit PowerPC -----------*- C++ -*-//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains the entry points for global functions defined in the LLVM
-// Darwin/PowerPC back-end.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef TARGET_POWERPC32_H
-#define TARGET_POWERPC32_H
-
-#include "PowerPC.h"
-#include <iosfwd>
-
-namespace llvm {
-
-class FunctionPass;
-class TargetMachine;
-
-FunctionPass *createPPC32ISelSimple(TargetMachine &TM);
-FunctionPass *createPPC32AsmPrinter(std::ostream &OS,TargetMachine &TM);
-
-} // end namespace llvm;
-
-#endif
#include "PowerPC.h"
#include "PowerPCInstrBuilder.h"
#include "PowerPCInstrInfo.h"
-#include "PPC32.h"
#include "PPC32TargetMachine.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
public:
PPC32JITInfo(TargetMachine &tm) : PowerPCJITInfo(tm) {}
- /// addPassesToJITCompile - Add passes to the specified pass manager to
- /// implement a fast dynamic compiler for this target. Return true if this
- /// is not supported for this target.
- ///
- virtual void addPassesToJITCompile(FunctionPassManager &PM);
-
/// replaceMachineCodeForFunction - Make it so that calling the function
/// whose machine code is at OLD turns into a call to NEW, perhaps by
/// overwriting OLD with a branch to NEW. This is used for self-modifying
+++ /dev/null
-//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-//
-//===----------------------------------------------------------------------===//
-
-#include "PPC32.h"
-#include "PPC32JITInfo.h"
-#include "PPC32TargetMachine.h"
-#include "llvm/Module.h"
-#include "llvm/PassManager.h"
-#include "llvm/CodeGen/IntrinsicLowering.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetOptions.h"
-#include "llvm/Target/TargetMachineRegistry.h"
-#include "llvm/Transforms/Scalar.h"
-#include <iostream>
-using namespace llvm;
-
-namespace {
- const std::string PPC32 = "Darwin/PowerPC";
- // Register the target
- RegisterTarget<PPC32TargetMachine>
- X("powerpc-darwin", " Darwin/PowerPC (experimental)");
-}
-
-/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
-///
-PPC32TargetMachine::PPC32TargetMachine(const Module &M,
- IntrinsicLowering *IL)
- : PowerPCTargetMachine(PPC32, IL,
- TargetData(PPC32,false,4,4,4,4,4,4,2,1,4),
- TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,-4),
- PPC32JITInfo(*this)) {}
-
-/// addPassesToEmitAssembly - Add passes to the specified pass manager
-/// to implement a static compiler for this target.
-///
-bool PPC32TargetMachine::addPassesToEmitAssembly(PassManager &PM,
- std::ostream &Out) {
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // FIXME: Implement the switch instruction in the instruction selector!
- PM.add(createLowerSwitchPass());
-
- PM.add(createLowerConstantExpressionsPass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
-
- PM.add(createPPC32ISelSimple(*this));
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- PM.add(createRegisterAllocator());
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- // I want a PowerPC specific prolog/epilog code inserter so I can put the
- // fills/spills in the right spots.
- PM.add(createPowerPCPEI());
-
- // Must run branch selection immediately preceding the printer
- PM.add(createPPCBranchSelectionPass());
- PM.add(createPPC32AsmPrinter(Out, *this));
- PM.add(createMachineCodeDeleter());
- return false;
-}
-
-/// addPassesToJITCompile - Add passes to the specified pass manager to
-/// implement a fast dynamic compiler for this target.
-///
-void PPC32JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // FIXME: Implement the switch instruction in the instruction selector!
- PM.add(createLowerSwitchPass());
-
- PM.add(createLowerConstantExpressionsPass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
-
- PM.add(createPPC32ISelSimple(TM));
- PM.add(createRegisterAllocator());
- PM.add(createPrologEpilogCodeInserter());
-}
-
-unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
- if (M.getEndianness() == Module::BigEndian &&
- M.getPointerSize() == Module::Pointer32)
- return 10; // Direct match
- else if (M.getEndianness() != Module::AnyEndianness ||
- M.getPointerSize() != Module::AnyPointerSize)
- return 0; // Match for some other target
-
- return getJITMatchQuality()/2;
-}
+++ /dev/null
-//===-- PPC64.h - Top-level interface for AIX/PowerPC -------------*- C++ -*-//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains the entry points for global functions defined in the LLVM
-// PowerPC 64-bit back-end.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef TARGET_POWERPC_AIX_H
-#define TARGET_POWERPC_AIX_H
-
-#include "PowerPC.h"
-
-#endif
public:
PPC64JITInfo(TargetMachine &tm) : PowerPCJITInfo(tm) {}
- /// addPassesToJITCompile - Add passes to the specified pass manager to
- /// implement a fast dynamic compiler for this target. Return true if this
- /// is not supported for this target.
- ///
- virtual void addPassesToJITCompile(FunctionPassManager &PM);
-
/// replaceMachineCodeForFunction - Make it so that calling the function
/// whose machine code is at OLD turns into a call to NEW, perhaps by
/// overwriting OLD with a branch to NEW. This is used for self-modifying
+++ /dev/null
-//===-- PPC64TargetMachine.cpp - Define TargetMachine for AIX/PowerPC ----===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-//
-//===----------------------------------------------------------------------===//
-
-#include "PowerPC.h"
-#include "PPC64JITInfo.h"
-#include "PPC64TargetMachine.h"
-#include "llvm/Module.h"
-#include "llvm/PassManager.h"
-#include "llvm/CodeGen/IntrinsicLowering.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetOptions.h"
-#include "llvm/Target/TargetMachineRegistry.h"
-#include "llvm/Transforms/Scalar.h"
-#include <iostream>
-using namespace llvm;
-
-namespace {
- const std::string PPC64 = "AIX/PowerPC";
- // Register the target
- RegisterTarget<PPC64TargetMachine>
- X("powerpc-aix", " AIX/PowerPC (experimental)");
-}
-
-/// PPC64TargetMachine ctor
-///
-PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
- // FIXME: this is wrong!
- : PowerPCTargetMachine(PPC64, IL,
- TargetData(PPC64,false,8,4,4,4,4,4,2,1,4),
- TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,-4),
- PPC64JITInfo(*this)) {}
-
-/// addPassesToEmitAssembly - Add passes to the specified pass manager
-/// to implement a static compiler for this target.
-///
-bool PPC64TargetMachine::addPassesToEmitAssembly(PassManager &PM,
- std::ostream &Out) {
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // FIXME: Implement the switch instruction in the instruction selector!
- PM.add(createLowerSwitchPass());
-
- PM.add(createLowerConstantExpressionsPass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
-
- // FIXME: instruction selector!
- //PM.add(createPPCSimpleInstructionSelector(*this));
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- PM.add(createRegisterAllocator());
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- // I want a PowerPC specific prolog/epilog code inserter so I can put the
- // fills/spills in the right spots.
- //PM.add(createPowerPCPEI());
-
- // Must run branch selection immediately preceding the printer
- //PM.add(createPPCBranchSelectionPass());
- //PM.add(createPPC32AsmPrinterPass(Out, *this));
- PM.add(createMachineCodeDeleter());
- return false;
-}
-
-/// addPassesToJITCompile - Add passes to the specified pass manager to
-/// implement a fast dynamic compiler for this target.
-///
-void PPC64JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // FIXME: Implement the switch instruction in the instruction selector!
- PM.add(createLowerSwitchPass());
-
- PM.add(createLowerConstantExpressionsPass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
-
- // FIXME: ISel
- //PM.add(createPPCSimpleInstructionSelector(TM));
- PM.add(createRegisterAllocator());
- PM.add(createPrologEpilogCodeInserter());
-}
-
-unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
- if (M.getEndianness() == Module::BigEndian &&
- M.getPointerSize() == Module::Pointer64)
- return 10; // Direct match
- else if (M.getEndianness() != Module::AnyEndianness ||
- M.getPointerSize() != Module::AnyPointerSize)
- return 0; // Match for some other target
-
- return getJITMatchQuality()/2;
-}
virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
MachineCodeEmitter &MCE);
- virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
-
static unsigned getModuleMatchQuality(const Module &M);
};
//
//===----------------------------------------------------------------------===//
-#include "PowerPCTargetMachine.h"
#include "PowerPC.h"
+#include "PowerPCTargetMachine.h"
+#include "PPC32TargetMachine.h"
+#include "PPC64TargetMachine.h"
+#include "PPC32JITInfo.h"
+#include "PPC64JITInfo.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/IntrinsicLowering.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Transforms/Scalar.h"
+#include "Support/CommandLine.h"
#include <iostream>
using namespace llvm;
+namespace {
+ cl::opt<bool>
+ AIX("aix",
+ cl::desc("Generate AIX/xcoff rather than Darwin/macho"),
+ cl::Hidden);
+ const std::string PPC32 = "PowerPC/32bit";
+ const std::string PPC64 = "PowerPC/64bit";
+
+ // Register the targets
+ RegisterTarget<PPC32TargetMachine>
+ X("ppc32", " PowerPC 32bit (experimental)");
+ RegisterTarget<PPC64TargetMachine>
+ Y("ppc64", " PowerPC 64bit (unimplemented)");
+}
+
PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
IntrinsicLowering *IL,
const TargetData &TD,
#endif
}
+/// addPassesToEmitAssembly - Add passes to the specified pass manager
+/// to implement a static compiler for this target.
+///
+bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
+ std::ostream &Out) {
+ bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
+
+ // FIXME: Implement efficient support for garbage collection intrinsics.
+ PM.add(createLowerGCPass());
+
+ // FIXME: Implement the invoke/unwind instructions!
+ PM.add(createLowerInvokePass());
+
+ // FIXME: Implement the switch instruction in the instruction selector!
+ PM.add(createLowerSwitchPass());
+
+ PM.add(createLowerConstantExpressionsPass());
+
+ // Make sure that no unreachable blocks are instruction selected.
+ PM.add(createUnreachableBlockEliminationPass());
+
+ if (LP64)
+ PM.add(createPPC32ISelSimple(*this));
+ else
+ PM.add(createPPC32ISelSimple(*this));
+
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
+ PM.add(createRegisterAllocator());
+
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
+ // I want a PowerPC specific prolog/epilog code inserter so I can put the
+ // fills/spills in the right spots.
+ PM.add(createPowerPCPEI());
+
+ // Must run branch selection immediately preceding the printer
+ PM.add(createPPCBranchSelectionPass());
+
+ if (AIX)
+ PM.add(createPPC32AsmPrinter(Out, *this));
+ else
+ PM.add(createPPC32AsmPrinter(Out, *this));
+
+ PM.add(createMachineCodeDeleter());
+ return false;
+}
+
void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
- assert(0 && "Cannot execute PowerPCJITInfo::addPassesToJITCompile()");
+ // FIXME: Implement efficient support for garbage collection intrinsics.
+ PM.add(createLowerGCPass());
+
+ // FIXME: Implement the invoke/unwind instructions!
+ PM.add(createLowerInvokePass());
+
+ // FIXME: Implement the switch instruction in the instruction selector!
+ PM.add(createLowerSwitchPass());
+
+ PM.add(createLowerConstantExpressionsPass());
+
+ // Make sure that no unreachable blocks are instruction selected.
+ PM.add(createUnreachableBlockEliminationPass());
+
+ PM.add(createPPC32ISelSimple(TM));
+ PM.add(createRegisterAllocator());
+ PM.add(createPrologEpilogCodeInserter());
}
void PowerPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
assert(0 && "Cannot execute PowerPCJITInfo::getJITStubForFunction()");
return 0;
}
+
+/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
+///
+PPC32TargetMachine::PPC32TargetMachine(const Module &M,
+ IntrinsicLowering *IL)
+ : PowerPCTargetMachine(PPC32, IL,
+ TargetData(PPC32,false,4,4,4,4,4,4,2,1,4),
+ TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,0),
+ PPC32JITInfo(*this)) {}
+
+/// PPC64TargetMachine ctor - Create a LP64 architecture model
+///
+PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
+ : PowerPCTargetMachine(PPC64, IL,
+ TargetData(PPC64,false,8,4,4,4,4,4,2,1,4),
+ TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,0),
+ PPC64JITInfo(*this)) {}
+
+unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
+ if (M.getEndianness() == Module::BigEndian &&
+ M.getPointerSize() == Module::Pointer32)
+ return 10; // Direct match
+ else if (M.getEndianness() != Module::AnyEndianness ||
+ M.getPointerSize() != Module::AnyPointerSize)
+ return 0; // Match for some other target
+
+ return getJITMatchQuality()/2;
+}
+
+unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
+ if (M.getEndianness() == Module::BigEndian &&
+ M.getPointerSize() == Module::Pointer64)
+ return 10; // Direct match
+ else if (M.getEndianness() != Module::AnyEndianness ||
+ M.getPointerSize() != Module::AnyPointerSize)
+ return 0; // Match for some other target
+
+ return getJITMatchQuality()/2;
+}
virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
MachineCodeEmitter &MCE);
- virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
-
static unsigned getModuleMatchQuality(const Module &M);
-
- // Two shared sets between the instruction selector and the printer allow for
- // correct linkage on Darwin
- std::set<GlobalValue*> CalledFunctions;
- std::set<GlobalValue*> AddressTaken;
};
} // end namespace llvm
}
static unsigned getJITMatchQuality();
+
+ virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
+
+ // Two shared sets between the instruction selector and the printer allow for
+ // correct linkage on Darwin
+ std::set<GlobalValue*> CalledFunctions;
+ std::set<GlobalValue*> AddressTaken;
};
} // end namespace llvm
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