remove misleading comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42970 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 2396d792dda3a63ed72ef8dd376433b3fc02b267..42f1dd1dbd79286b5426581ead3bb477ec304f5e 100644 (file)
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -4623,8 +4623,7 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
   unsigned VTBits = MVT::getSizeInBits(Op.getValueType());
   unsigned NVTBits = MVT::getSizeInBits(NVT);
 
-  // Handle the case when Amt is an immediate.  Other cases are currently broken
-  // and are disabled.
+  // Handle the case when Amt is an immediate.
   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Amt.Val)) {
     unsigned Cst = CN->getValue();
     // Expand the incoming operand to be shifted, so that we have its parts