Update to use new interface for register info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5098 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86RegisterClasses.cpp b/lib/Target/X86/X86RegisterClasses.cpp
index e8739a4339c0402b685555d060cdd1d813433dc9..c9d0aa46f2c6be722ed169d4600e0a27b372ee5f 100644 (file)
--- a/lib/Target/X86/X86RegisterClasses.cpp
+++ b/lib/Target/X86/X86RegisterClasses.cpp
@@ -48,6 +48,30 @@ namespace {
   };
 }
 
+
+// Create static lists to contain register alias sets...
+#define ALIASLIST(NAME, ...) \
+  static const unsigned NAME[] = { __VA_ARGS__ };
+#include "X86RegisterInfo.def"
+
+
+// X86Regs - Turn the X86RegisterInfo.def file into a bunch of register
+// descriptors
+//
+static const MRegisterDesc X86Regs[] = {
+#define R(ENUM, NAME, FLAGS, TSFLAGS, ALIAS_SET) \
+         { NAME, ALIAS_SET, FLAGS, TSFLAGS },
+#include "X86RegisterInfo.def"
+};
+
+X86RegisterInfo::X86RegisterInfo()
+  : MRegisterInfo(X86Regs, sizeof(X86Regs)/sizeof(X86Regs[0]),
+                  X86RegClasses,
+                  X86RegClasses+sizeof(X86RegClasses)/sizeof(X86RegClasses[0])){
+}
+
+
+
 const TargetRegisterClass* X86RegisterInfo::getRegClassForType(const Type* Ty)
   const {
   switch (Ty->getPrimitiveID()) {
@@ -71,17 +95,3 @@ const TargetRegisterClass* X86RegisterInfo::getRegClassForType(const Type* Ty)
     return 0;  // not reached
   }
 }
-
-
-MRegisterInfo::const_iterator X86RegisterInfo::regclass_begin() const {
-  return X86RegClasses;
-}
-
-unsigned X86RegisterInfo::getNumRegClasses() const {
-  return sizeof(X86RegClasses)/sizeof(X86RegClasses[0]);
-}
-
-MRegisterInfo::const_iterator X86RegisterInfo::regclass_end() const {
-  return X86RegClasses+getNumRegClasses();
-}
-

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 909a79cee708f525cdbfe9ee208d1ce2f3f9700e..9fcec8ce2e3c5dfbd03cb83cae819998cb59d657 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -12,25 +12,6 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineFunction.h"
 
-// Create static lists to contain register alias sets...
-#define ALIASLIST(NAME, ...) \
-  static const unsigned NAME[] = { __VA_ARGS__ };
-#include "X86RegisterInfo.def"
-
-
-// X86Regs - Turn the X86RegisterInfo.def file into a bunch of register
-// descriptors
-//
-static const MRegisterDesc X86Regs[] = {
-#define R(ENUM, NAME, FLAGS, TSFLAGS, ALIAS_SET) \
-         { NAME, ALIAS_SET, FLAGS, TSFLAGS },
-#include "X86RegisterInfo.def"
-};
-
-X86RegisterInfo::X86RegisterInfo()
-  : MRegisterInfo(X86Regs, sizeof(X86Regs)/sizeof(X86Regs[0])) {
-}
-
 unsigned getIdx(unsigned dataSize) {
   switch (dataSize) {
   case 1: return 0;

diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h
index be45f307e0c4e8cae9abbbf444952b4c2ce790e2..52e530e302b9a0530a2dbda69183f8cd8166144d 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.h
+++ b/lib/Target/X86/X86RegisterInfo.h
@@ -14,9 +14,6 @@ class Type;
 struct X86RegisterInfo : public MRegisterInfo {
   X86RegisterInfo();
 
-  MRegisterInfo::const_iterator regclass_begin() const;
-  MRegisterInfo::const_iterator regclass_end() const;
-
   MachineBasicBlock::iterator
   storeReg2RegOffset(MachineBasicBlock &MBB,
                      MachineBasicBlock::iterator MBBI,
@@ -53,9 +50,6 @@ struct X86RegisterInfo : public MRegisterInfo {
   const TargetRegisterClass *getClassForReg(unsigned Reg) const;
 
   const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
-
-  unsigned getNumRegClasses() const;
-
 };
 
 #endif