Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55777 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index 51ef25a87c6f667996d83943f91a0fb7d5ba3d1d..f46777cd5172eabdd85e1239761050953eab979b 100644 (file)
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -157,10 +157,10 @@ bool X86FastISel::X86SelectStore(Instruction* I) {
   X86AddressMode AM;
   if (Op1)
     // Address is in register.
-    AM.Base.Reg = Op0;
+    AM.Base.Reg = Op1;
   else
     AM.GV = cast<GlobalValue>(V);
-  addFullAddress(BuildMI(MBB, TII.get(Opc)), AM);
+  addFullAddress(BuildMI(MBB, TII.get(Opc)), AM).addReg(Op0);
   return true;
 }
 
@@ -255,6 +255,8 @@ X86FastISel::TargetSelectInstruction(Instruction *I)  {
   default: break;
   case Instruction::Load:
     return X86SelectLoad(I);
+  case Instruction::Store:
+    return X86SelectStore(I);
   }
 
   return false;

diff --git a/test/CodeGen/X86/fast-isel-mem.ll b/test/CodeGen/X86/fast-isel-mem.ll
index 5c39fb401707e72a5c41d12a634b42f61857e60f..ca175c48bf34e8cf4570a6e72742a428db390cac 100644 (file)
--- a/test/CodeGen/X86/fast-isel-mem.ll
+++ b/test/CodeGen/X86/fast-isel-mem.ll
@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -fast-isel -mtriple=i386-apple-darwin -mattr=sse2 | \
-; RUN:   grep mov | grep lazy_ptr | count 2
+; RUN:   grep mov | grep lazy_ptr | count 1
 
 @src = external global i32